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staging: fbtft: Add support for orientation on Himax HX8347d
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Himax HX8347d has non-standard register to control orientation.
Add support for different orientation values.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210503172114.27891-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Andy Shevchenko authored and Greg Kroah-Hartman committed May 10, 2021
1 parent 37667f6 commit fd4c596
Showing 1 changed file with 26 additions and 3 deletions.
29 changes: 26 additions & 3 deletions drivers/staging/fbtft/fb_hx8347d.c
Original file line number Diff line number Diff line change
Expand Up @@ -68,9 +68,6 @@ static int init_display(struct fbtft_par *par)
mdelay(40);
write_reg(par, 0x28, 0x3C);

/* orientation */
write_reg(par, 0x16, 0x60 | (par->bgr << 3));

return 0;
}

Expand All @@ -87,6 +84,31 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
write_reg(par, 0x22);
}

#define MEM_Y BIT(7) /* MY row address order */
#define MEM_X BIT(6) /* MX column address order */
#define MEM_V BIT(5) /* MV row / column exchange */
#define MEM_L BIT(4) /* ML vertical refresh order */
#define MEM_BGR (3) /* RGB-BGR Order */
static int set_var(struct fbtft_par *par)
{
switch (par->info->var.rotate) {
case 0:
write_reg(par, 0x16, MEM_V | MEM_X | (par->bgr << MEM_BGR));
break;
case 270:
write_reg(par, 0x16, par->bgr << MEM_BGR);
break;
case 180:
write_reg(par, 0x16, MEM_V | MEM_Y | (par->bgr << MEM_BGR));
break;
case 90:
write_reg(par, 0x16, MEM_X | MEM_Y | (par->bgr << MEM_BGR));
break;
}

return 0;
}

/*
* Gamma string format:
* VRP0 VRP1 VRP2 VRP3 VRP4 VRP5 PRP0 PRP1 PKP0 PKP1 PKP2 PKP3 PKP4 CGM
Expand Down Expand Up @@ -144,6 +166,7 @@ static struct fbtft_display display = {
.fbtftops = {
.init_display = init_display,
.set_addr_win = set_addr_win,
.set_var = set_var,
.set_gamma = set_gamma,
},
};
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