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ALSA: ca0106: Rename register macro names
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ca0106 driver code uses too generic names for its register definitions
such as PTR, DATA, IPR, etc, which may eventually conflict with other
code.  This patch renames (some of) those register definitions with
CA0106_ prefix to avoid the conflicts.

Link: https://lore.kernel.org/r/20220210124227.11272-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Takashi Iwai committed Feb 10, 2022
1 parent 69458e2 commit fdb1e56
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Showing 3 changed files with 52 additions and 52 deletions.
18 changes: 9 additions & 9 deletions sound/pci/ca0106/ca0106.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -59,15 +59,15 @@
/* PCI function 0 registers, address = <val> + PCIBASE0 */
/************************************************************************************************/

#define PTR 0x00 /* Indexed register set pointer register */
#define CA0106_PTR 0x00 /* Indexed register set pointer register */
/* NOTE: The CHANNELNUM and ADDRESS words can */
/* be modified independently of each other. */
/* CNL[1:0], ADDR[27:16] */

#define DATA 0x04 /* Indexed register set data register */
#define CA0106_DATA 0x04 /* Indexed register set data register */
/* DATA[31:0] */

#define IPR 0x08 /* Global interrupt pending register */
#define CA0106_IPR 0x08 /* Global interrupt pending register */
/* Clear pending interrupts by writing a 1 to */
/* the relevant bits and zero to the other bits */
#define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
Expand All @@ -88,7 +88,7 @@
#define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
#define IPR_PCI 0x00000001 /* PCI Bus error */

#define INTE 0x0c /* Interrupt enable register */
#define CA0106_INTE 0x0c /* Interrupt enable register */

#define INTE_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
#define INTE_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
Expand All @@ -108,8 +108,8 @@
#define INTE_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
#define INTE_PCI 0x00000001 /* PCI Bus error */

#define UNKNOWN10 0x10 /* Unknown ??. Defaults to 0 */
#define HCFG 0x14 /* Hardware config register */
#define CA0106_UNKNOWN10 0x10 /* Unknown ??. Defaults to 0 */
#define CA0106_HCFG 0x14 /* Hardware config register */
/* 0x1000 causes AC3 to fails. It adds a dither bit. */

#define HCFG_STAC 0x10000000 /* Special mode for STAC9460 Codec. */
Expand All @@ -133,7 +133,7 @@
#define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
/* Should be set to 1 when the EMU10K1 is */
/* completely initialized. */
#define GPIO 0x18 /* Defaults: 005f03a3-Analog, 005f02a2-SPDIF. */
#define CA0106_GPIO 0x18 /* Defaults: 005f03a3-Analog, 005f02a2-SPDIF. */
/* Here pins 0,1,2,3,4,,6 are output. 5,7 are input */
/* For the Audigy LS, pin 0 (or bit 8) controls the SPDIF/Analog jack. */
/* SB Live 24bit:
Expand All @@ -152,9 +152,9 @@
* GPO [15:8] Default 0x9. (Default to SPDIF jack enabled for SPDIF)
* GPO Enable [23:16] Default 0x0f. Setting a bit to 1, causes the pin to be an output pin.
*/
#define AC97DATA 0x1c /* AC97 register set data register (16 bit) */
#define CA0106_AC97DATA 0x1c /* AC97 register set data register (16 bit) */

#define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */
#define CA0106_AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */

/********************************************************************************************************/
/* CA0106 pointer-offset register set, accessed through the PTR and DATA registers */
Expand Down
70 changes: 35 additions & 35 deletions sound/pci/ca0106/ca0106_main.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -338,8 +338,8 @@ unsigned int snd_ca0106_ptr_read(struct snd_ca0106 * emu,
regptr = (reg << 16) | chn;

spin_lock_irqsave(&emu->emu_lock, flags);
outl(regptr, emu->port + PTR);
val = inl(emu->port + DATA);
outl(regptr, emu->port + CA0106_PTR);
val = inl(emu->port + CA0106_DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
return val;
}
Expand All @@ -355,8 +355,8 @@ void snd_ca0106_ptr_write(struct snd_ca0106 *emu,
regptr = (reg << 16) | chn;

spin_lock_irqsave(&emu->emu_lock, flags);
outl(regptr, emu->port + PTR);
outl(data, emu->port + DATA);
outl(regptr, emu->port + CA0106_PTR);
outl(data, emu->port + CA0106_DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}

Expand Down Expand Up @@ -455,8 +455,8 @@ static void snd_ca0106_intr_enable(struct snd_ca0106 *emu, unsigned int intrenb)
unsigned int intr_enable;

spin_lock_irqsave(&emu->emu_lock, flags);
intr_enable = inl(emu->port + INTE) | intrenb;
outl(intr_enable, emu->port + INTE);
intr_enable = inl(emu->port + CA0106_INTE) | intrenb;
outl(intr_enable, emu->port + CA0106_INTE);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}

Expand All @@ -466,8 +466,8 @@ static void snd_ca0106_intr_disable(struct snd_ca0106 *emu, unsigned int intrenb
unsigned int intr_enable;

spin_lock_irqsave(&emu->emu_lock, flags);
intr_enable = inl(emu->port + INTE) & ~intrenb;
outl(intr_enable, emu->port + INTE);
intr_enable = inl(emu->port + CA0106_INTE) & ~intrenb;
outl(intr_enable, emu->port + CA0106_INTE);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}

Expand Down Expand Up @@ -786,9 +786,9 @@ static int snd_ca0106_pcm_prepare_playback(struct snd_pcm_substream *substream)
hcfg_set = 0;
break;
}
hcfg = inl(emu->port + HCFG) ;
hcfg = inl(emu->port + CA0106_HCFG) ;
hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
outl(hcfg, emu->port + HCFG);
outl(hcfg, emu->port + CA0106_HCFG);
reg40 = snd_ca0106_ptr_read(emu, 0x40, 0);
reg40 = (reg40 & ~reg40_mask) | reg40_set;
snd_ca0106_ptr_write(emu, 0x40, 0, reg40);
Expand Down Expand Up @@ -888,9 +888,9 @@ static int snd_ca0106_pcm_prepare_capture(struct snd_pcm_substream *substream)
hcfg_set = 0;
break;
}
hcfg = inl(emu->port + HCFG) ;
hcfg = inl(emu->port + CA0106_HCFG) ;
hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
outl(hcfg, emu->port + HCFG);
outl(hcfg, emu->port + CA0106_HCFG);
reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
reg71 = (reg71 & ~reg71_mask) | reg71_set;
snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
Expand Down Expand Up @@ -1142,8 +1142,8 @@ static unsigned short snd_ca0106_ac97_read(struct snd_ac97 *ac97,
unsigned short val;

spin_lock_irqsave(&emu->emu_lock, flags);
outb(reg, emu->port + AC97ADDRESS);
val = inw(emu->port + AC97DATA);
outb(reg, emu->port + CA0106_AC97ADDRESS);
val = inw(emu->port + CA0106_AC97DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
return val;
}
Expand All @@ -1155,8 +1155,8 @@ static void snd_ca0106_ac97_write(struct snd_ac97 *ac97,
unsigned long flags;

spin_lock_irqsave(&emu->emu_lock, flags);
outb(reg, emu->port + AC97ADDRESS);
outw(val, emu->port + AC97DATA);
outb(reg, emu->port + CA0106_AC97ADDRESS);
outw(val, emu->port + CA0106_AC97DATA);
spin_unlock_irqrestore(&emu->emu_lock, flags);
}

Expand Down Expand Up @@ -1200,7 +1200,7 @@ static irqreturn_t snd_ca0106_interrupt(int irq, void *dev_id)
unsigned int stat76;
struct snd_ca0106_channel *pchannel;

status = inl(chip->port + IPR);
status = inl(chip->port + CA0106_IPR);
if (! status)
return IRQ_NONE;

Expand Down Expand Up @@ -1255,7 +1255,7 @@ static irqreturn_t snd_ca0106_interrupt(int irq, void *dev_id)
}

// acknowledge the interrupt if necessary
outl(status, chip->port+IPR);
outl(status, chip->port + CA0106_IPR);

return IRQ_HANDLED;
}
Expand Down Expand Up @@ -1383,7 +1383,7 @@ static void ca0106_init_chip(struct snd_ca0106 *chip, int resume)
int ch;
unsigned int def_bits;

outl(0, chip->port + INTE);
outl(0, chip->port + CA0106_INTE);

/*
* Init to 0x02109204 :
Expand Down Expand Up @@ -1420,8 +1420,8 @@ static void ca0106_init_chip(struct snd_ca0106 *chip, int resume)
snd_ca0106_ptr_write(chip, CAPTURE_MUTE, 0, 0x00fc0000);

/* Write 0x8000 to AC97_REC_GAIN to mute it. */
outb(AC97_REC_GAIN, chip->port + AC97ADDRESS);
outw(0x8000, chip->port + AC97DATA);
outb(AC97_REC_GAIN, chip->port + CA0106_AC97ADDRESS);
outw(0x8000, chip->port + CA0106_AC97DATA);
#if 0 /* FIXME: what are these? */
snd_ca0106_ptr_write(chip, SPCS0, 0, 0x2108006);
snd_ca0106_ptr_write(chip, 0x42, 0, 0x2108006);
Expand Down Expand Up @@ -1495,30 +1495,30 @@ static void ca0106_init_chip(struct snd_ca0106 *chip, int resume)
/* FIXME: Still need to find out what the other GPIO bits do.
* E.g. For digital spdif out.
*/
outl(0x0, chip->port+GPIO);
/* outl(0x00f0e000, chip->port+GPIO); */ /* Analog */
outl(0x005f5301, chip->port+GPIO); /* Analog */
outl(0x0, chip->port + CA0106_GPIO);
/* outl(0x00f0e000, chip->port + CA0106_GPIO); */ /* Analog */
outl(0x005f5301, chip->port + CA0106_GPIO); /* Analog */
} else if (chip->details->gpio_type == 1) {
/* The SB0410 and SB0413 use GPIO differently. */
/* FIXME: Still need to find out what the other GPIO bits do.
* E.g. For digital spdif out.
*/
outl(0x0, chip->port+GPIO);
/* outl(0x00f0e000, chip->port+GPIO); */ /* Analog */
outl(0x005f5301, chip->port+GPIO); /* Analog */
outl(0x0, chip->port + CA0106_GPIO);
/* outl(0x00f0e000, chip->port + CA0106_GPIO); */ /* Analog */
outl(0x005f5301, chip->port + CA0106_GPIO); /* Analog */
} else {
outl(0x0, chip->port+GPIO);
outl(0x005f03a3, chip->port+GPIO); /* Analog */
/* outl(0x005f02a2, chip->port+GPIO); */ /* SPDIF */
outl(0x0, chip->port + CA0106_GPIO);
outl(0x005f03a3, chip->port + CA0106_GPIO); /* Analog */
/* outl(0x005f02a2, chip->port + CA0106_GPIO); */ /* SPDIF */
}
snd_ca0106_intr_enable(chip, 0x105); /* Win2000 uses 0x1e0 */

/* outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG); */
/* 0x1000 causes AC3 to fails. Maybe it effects 24 bit output. */
/* outl(0x00001409, chip->port+HCFG); */
/* outl(0x00000009, chip->port+HCFG); */
/* outl(0x00001409, chip->port + CA0106_HCFG); */
/* outl(0x00000009, chip->port + CA0106_HCFG); */
/* AC97 2.0, Enable outputs. */
outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port+HCFG);
outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port + CA0106_HCFG);

if (chip->details->i2c_adc == 1) {
/* The SB0410 and SB0413 use I2C to control ADC. */
Expand Down Expand Up @@ -1560,12 +1560,12 @@ static void ca0106_stop_chip(struct snd_ca0106 *chip)
{
/* disable interrupts */
snd_ca0106_ptr_write(chip, BASIC_INTERRUPT, 0, 0);
outl(0, chip->port + INTE);
outl(0, chip->port + CA0106_INTE);
snd_ca0106_ptr_write(chip, EXTENDED_INT_MASK, 0, 0);
udelay(1000);
/* disable audio */
/* outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG); */
outl(0, chip->port + HCFG);
outl(0, chip->port + CA0106_HCFG);
/* FIXME: We need to stop and DMA transfers here.
* But as I am not sure how yet, we cannot from the dma pages.
* So we can fix: snd-malloc: Memory leak? pages not freed = 8
Expand Down
16 changes: 8 additions & 8 deletions sound/pci/ca0106/ca0106_mixer.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -70,17 +70,17 @@ static void ca0106_spdif_enable(struct snd_ca0106 *emu)
snd_ca0106_ptr_write(emu, SPDIF_SELECT2, 0, 0x0b000000);
val = snd_ca0106_ptr_read(emu, CAPTURE_CONTROL, 0) & ~0x1000;
snd_ca0106_ptr_write(emu, CAPTURE_CONTROL, 0, val);
val = inl(emu->port + GPIO) & ~0x101;
outl(val, emu->port + GPIO);
val = inl(emu->port + CA0106_GPIO) & ~0x101;
outl(val, emu->port + CA0106_GPIO);

} else {
/* Analog */
snd_ca0106_ptr_write(emu, SPDIF_SELECT1, 0, 0xf);
snd_ca0106_ptr_write(emu, SPDIF_SELECT2, 0, 0x000f0000);
val = snd_ca0106_ptr_read(emu, CAPTURE_CONTROL, 0) | 0x1000;
snd_ca0106_ptr_write(emu, CAPTURE_CONTROL, 0, val);
val = inl(emu->port + GPIO) | 0x101;
outl(val, emu->port + GPIO);
val = inl(emu->port + CA0106_GPIO) | 0x101;
outl(val, emu->port + CA0106_GPIO);
}
}

Expand Down Expand Up @@ -119,14 +119,14 @@ static void ca0106_set_capture_mic_line_in(struct snd_ca0106 *emu)

if (emu->capture_mic_line_in) {
/* snd_ca0106_i2c_write(emu, ADC_MUX, 0); */ /* Mute input */
tmp = inl(emu->port+GPIO) & ~0x400;
tmp = inl(emu->port + CA0106_GPIO) & ~0x400;
tmp = tmp | 0x400;
outl(tmp, emu->port+GPIO);
outl(tmp, emu->port + CA0106_GPIO);
/* snd_ca0106_i2c_write(emu, ADC_MUX, ADC_MUX_MIC); */
} else {
/* snd_ca0106_i2c_write(emu, ADC_MUX, 0); */ /* Mute input */
tmp = inl(emu->port+GPIO) & ~0x400;
outl(tmp, emu->port+GPIO);
tmp = inl(emu->port + CA0106_GPIO) & ~0x400;
outl(tmp, emu->port + CA0106_GPIO);
/* snd_ca0106_i2c_write(emu, ADC_MUX, ADC_MUX_LINEIN); */
}
}
Expand Down

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