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tile: use PCI define for Max_Read_Request_Size
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Replace a magic number with a PCI #define symbol.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Chris Metcalf <cmetcalf@ezchip.com>
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Rafał Miłecki authored and Bjorn Helgaas committed Jan 27, 2015
1 parent b33f87c commit ff59887
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions arch/tile/kernel/pci.c
Original file line number Diff line number Diff line change
Expand Up @@ -245,7 +245,7 @@ static void fixup_read_and_payload_sizes(void)
{
struct pci_dev *dev = NULL;
int smallest_max_payload = 0x1; /* Tile maxes out at 256 bytes. */
int max_read_size = 0x2; /* Limit to 512 byte reads. */
int max_read_size = PCI_EXP_DEVCTL_READRQ_512B;
u16 new_values;

/* Scan for the smallest maximum payload size. */
Expand All @@ -258,7 +258,7 @@ static void fixup_read_and_payload_sizes(void)
}

/* Now, set the max_payload_size for all devices to that value. */
new_values = (max_read_size << 12) | (smallest_max_payload << 5);
new_values = max_read_size | (smallest_max_payload << 5);
for_each_pci_dev(dev)
pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
PCI_EXP_DEVCTL_PAYLOAD | PCI_EXP_DEVCTL_READRQ,
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