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Merge series "ASoC: codecs: wcd934x: add Headset and button detection…
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… support" from Srinivas Kandagatla <srinivas.kandagatla@linaro.org>:

This patchset adds support to MBHC(Multi Button Headset Control) block found in
Qualcomm WCD codecs. MBHC support headset type detection, both Mechanical and
electrical insert/removal detection along with 8 buttons detection,
Over current interrupts on HPHL/R, Impedance Measurements on HPHL/R.

Eventhough MBHC block supports things like OverCurrent detection, Currently its
reported as a kernel debug message. Should this be reported as an uevent to
userspace? like the way USB reports?
Any suggestions?

First patch adds a common mbhc driver and the second one wcd934x specific driver
changes along with sdm845 soundcard related changes.

Common wcd-mbhc-v2 driver should be reusable across multiple codecs like
WCD9335, WCD934x, WCD937x and WCD938x.

Most of the work is derived from downstream Qualcomm kernels.
Credits to various Qualcomm authors from Patrick Lai's team who have
contributed to this code.

Changes since v2:
- switched to EXPORT_SYMBOL_GPL from EXPORT_SYMBOL
- converted one of the if else to switch case.

Srinivas Kandagatla (4):
  ASoC: dt-bindings: wcd934x: add bindings for Headset Button detection
  ASoC: codecs: wcd: add multi button Headset detection support
  ASoC: codecs: wcd934x: add mbhc support
  ASoC: qcom: sdm845: add jack support for WCD934x

 .../bindings/sound/qcom,wcd934x.yaml          |   30 +
 include/linux/mfd/wcd934x/registers.h         |   57 +
 sound/soc/codecs/Kconfig                      |    4 +
 sound/soc/codecs/Makefile                     |    2 +
 sound/soc/codecs/wcd-mbhc-v2.c                | 1475 +++++++++++++++++
 sound/soc/codecs/wcd-mbhc-v2.h                |  340 ++++
 sound/soc/codecs/wcd934x.c                    |  884 +++++++++-
 sound/soc/qcom/sdm845.c                       |    8 +
 8 files changed, 2785 insertions(+), 15 deletions(-)
 create mode 100644 sound/soc/codecs/wcd-mbhc-v2.c
 create mode 100644 sound/soc/codecs/wcd-mbhc-v2.h

--
2.21.0
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Mark Brown committed Jun 4, 2021
2 parents e78f36b + c15d4b7 commit ffb2df6
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Showing 8 changed files with 2,785 additions and 15 deletions.
30 changes: 30 additions & 0 deletions Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -77,6 +77,31 @@ properties:
minimum: 1800000
maximum: 2850000

qcom,hphl-jack-type-normally-closed:
description: Indicates that HPHL jack switch type is normally closed
type: boolean

qcom,ground-jack-type-normally-closed:
description: Indicates that Headset Ground switch type is normally closed
type: boolean

qcom,mbhc-headset-vthreshold-microvolt:
description: Voltage threshold value for headset detection
minimum: 0
maximum: 2850000

qcom,mbhc-headphone-vthreshold-microvolt:
description: Voltage threshold value for headphone detection
minimum: 0
maximum: 2850000

qcom,mbhc-buttons-vthreshold-microvolt:
description:
Array of 8 Voltage threshold values corresponding to headset
button0 - button7
minItems: 8
maxItems: 8

clock-output-names:
const: mclk

Expand Down Expand Up @@ -159,6 +184,11 @@ examples:
qcom,micbias2-microvolt = <1800000>;
qcom,micbias3-microvolt = <1800000>;
qcom,micbias4-microvolt = <1800000>;
qcom,hphl-jack-type-normally-closed;
qcom,ground-jack-type-normally-closed;
qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
clock-names = "extclk";
clocks = <&rpmhcc 2>;
Expand Down
57 changes: 57 additions & 0 deletions include/linux/mfd/wcd934x/registers.h
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Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,8 @@
#define WCD934X_EFUSE_SENSE_STATE_DEF 0x10
#define WCD934X_EFUSE_SENSE_EN_MASK BIT(0)
#define WCD934X_EFUSE_SENSE_ENABLE BIT(0)
#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT1 0x002a
#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT2 0x002b
#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT14 0x0037
#define WCD934X_CHIP_TIER_CTRL_EFUSE_VAL_OUT15 0x0038
#define WCD934X_CHIP_TIER_CTRL_EFUSE_STATUS 0x0039
Expand Down Expand Up @@ -103,21 +105,58 @@
#define WCD934X_ANA_AMIC3 0x0610
#define WCD934X_ANA_AMIC4 0x0611
#define WCD934X_ANA_MBHC_MECH 0x0614
#define WCD934X_MBHC_L_DET_EN_MASK BIT(7)
#define WCD934X_MBHC_L_DET_EN BIT(7)
#define WCD934X_MBHC_GND_DET_EN_MASK BIT(6)
#define WCD934X_MBHC_MECH_DETECT_TYPE_MASK BIT(5)
#define WCD934X_MBHC_MECH_DETECT_TYPE_INS 1
#define WCD934X_MBHC_HPHL_PLUG_TYPE_MASK BIT(4)
#define WCD934X_MBHC_HPHL_PLUG_TYPE_NO 1
#define WCD934X_MBHC_GND_PLUG_TYPE_MASK BIT(3)
#define WCD934X_MBHC_GND_PLUG_TYPE_NO 1
#define WCD934X_MBHC_HSL_PULLUP_COMP_EN BIT(2)
#define WCD934X_MBHC_HSG_PULLUP_COMP_EN BIT(1)
#define WCD934X_MBHC_HPHL_100K_TO_GND_EN BIT(0)
#define WCD934X_ANA_MBHC_ELECT 0x0615
#define WCD934X_ANA_MBHC_BIAS_EN_MASK BIT(0)
#define WCD934X_ANA_MBHC_BIAS_EN BIT(0)
#define WCD934X_ANA_MBHC_ZDET 0x0616
#define WCD934X_ANA_MBHC_RESULT_1 0x0617
#define WCD934X_ANA_MBHC_RESULT_2 0x0618
#define WCD934X_ANA_MBHC_RESULT_3 0x0619
#define WCD934X_ANA_MBHC_BTN0 0x061a
#define WCD934X_VTH_MASK GENMASK(7, 2)
#define WCD934X_ANA_MBHC_BTN1 0x061b
#define WCD934X_ANA_MBHC_BTN2 0x061c
#define WCD934X_ANA_MBHC_BTN3 0x061d
#define WCD934X_ANA_MBHC_BTN4 0x061e
#define WCD934X_ANA_MBHC_BTN5 0x061f
#define WCD934X_ANA_MBHC_BTN6 0x0620
#define WCD934X_ANA_MBHC_BTN7 0x0621
#define WCD934X_MBHC_BTN_VTH_MASK GENMASK(7, 2)
#define WCD934X_ANA_MICB1 0x0622
#define WCD934X_MICB_VAL_MASK GENMASK(5, 0)
#define WCD934X_ANA_MICB_EN_MASK GENMASK(7, 6)
#define WCD934X_MICB_DISABLE 0
#define WCD934X_MICB_ENABLE 1
#define WCD934X_MICB_PULL_UP 2
#define WCD934X_MICB_PULL_DOWN 3
#define WCD934X_ANA_MICB_PULL_UP 0x80
#define WCD934X_ANA_MICB_ENABLE 0x40
#define WCD934X_ANA_MICB_DISABLE 0x0
#define WCD934X_ANA_MICB2 0x0623
#define WCD934X_ANA_MICB2_ENABLE BIT(6)
#define WCD934X_ANA_MICB2_ENABLE_MASK GENMASK(7, 6)
#define WCD934X_ANA_MICB2_VOUT_MASK GENMASK(5, 0)
#define WCD934X_ANA_MICB2_RAMP 0x0624
#define WCD934X_RAMP_EN_MASK BIT(7)
#define WCD934X_RAMP_SHIFT_CTRL_MASK GENMASK(4, 2)
#define WCD934X_ANA_MICB3 0x0625
#define WCD934X_ANA_MICB4 0x0626
#define WCD934X_BIAS_VBG_FINE_ADJ 0x0629
#define WCD934X_MBHC_CTL_CLK 0x0656
#define WCD934X_MBHC_CTL_BCS 0x065a
#define WCD934X_MBHC_STATUS_SPARE_1 0x065b
#define WCD934X_MICB1_TEST_CTL_1 0x066b
#define WCD934X_MICB1_TEST_CTL_2 0x066c
#define WCD934X_MICB2_TEST_CTL_1 0x066e
Expand All @@ -141,7 +180,11 @@
#define WCD934X_HPH_CNP_WG_CTL 0x06cc
#define WCD934X_HPH_GM3_BOOST_EN_MASK BIT(7)
#define WCD934X_HPH_GM3_BOOST_ENABLE BIT(7)
#define WCD934X_HPH_CNP_WG_TIME 0x06cd
#define WCD934X_HPH_OCP_CTL 0x06ce
#define WCD934X_HPH_PA_CTL2 0x06d2
#define WCD934X_HPHPA_GND_R_MASK BIT(6)
#define WCD934X_HPHPA_GND_L_MASK BIT(4)
#define WCD934X_HPH_L_EN 0x06d3
#define WCD934X_HPH_GAIN_SRC_SEL_MASK BIT(5)
#define WCD934X_HPH_GAIN_SRC_SEL_COMPANDER 0
Expand All @@ -152,6 +195,8 @@
#define WCD934X_HPH_OCP_DET_MASK BIT(0)
#define WCD934X_HPH_OCP_DET_ENABLE BIT(0)
#define WCD934X_HPH_OCP_DET_DISABLE 0
#define WCD934X_HPH_R_ATEST 0x06d8
#define WCD934X_HPHPA_GND_OVR_MASK BIT(1)
#define WCD934X_DIFF_LO_LO2_COMPANDER 0x06ea
#define WCD934X_DIFF_LO_LO1_COMPANDER 0x06eb
#define WCD934X_CLK_SYS_MCLK_PRG 0x0711
Expand All @@ -172,7 +217,19 @@
#define WCD934X_SIDO_NEW_VOUT_D_FREQ2 0x071e
#define WCD934X_SIDO_RIPPLE_FREQ_EN_MASK BIT(0)
#define WCD934X_SIDO_RIPPLE_FREQ_ENABLE BIT(0)
#define WCD934X_MBHC_NEW_CTL_1 0x0720
#define WCD934X_MBHC_CTL_RCO_EN_MASK BIT(7)
#define WCD935X_MBHC_CTL_RCO_EN BIT(7)
#define WCD934X_MBHC_NEW_CTL_2 0x0721
#define WCD934X_M_RTH_CTL_MASK GENMASK(3, 2)
#define WCD934X_MBHC_NEW_PLUG_DETECT_CTL 0x0722
#define WCD934X_HSDET_PULLUP_C_MASK GENMASK(7, 6)
#define WCD934X_MBHC_NEW_ZDET_ANA_CTL 0x0723
#define WCD934X_ZDET_RANGE_CTL_MASK GENMASK(3, 0)
#define WCD934X_ZDET_MAXV_CTL_MASK GENMASK(6, 4)
#define WCD934X_MBHC_NEW_ZDET_RAMP_CTL 0x0724
#define WCD934X_MBHC_NEW_FSM_STATUS 0x0725
#define WCD934X_MBHC_NEW_ADC_RESULT 0x0726
#define WCD934X_TX_NEW_AMIC_4_5_SEL 0x0727
#define WCD934X_HPH_NEW_INT_RDAC_HD2_CTL_L 0x0733
#define WCD934X_HPH_NEW_INT_RDAC_OVERRIDE_CTL 0x0735
Expand Down
4 changes: 4 additions & 0 deletions sound/soc/codecs/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -1536,9 +1536,13 @@ config SND_SOC_WCD9335
Qualcomm Technologies, Inc. (QTI) multimedia solutions,
including the MSM8996, MSM8976, and MSM8956 chipsets.

config SND_SOC_WCD_MBHC
tristate

config SND_SOC_WCD934X
tristate "WCD9340/WCD9341 Codec"
depends on COMMON_CLK
select SND_SOC_WCD_MBHC
depends on MFD_WCD934X
help
The WCD9340/9341 is a audio codec IC Integrated in
Expand Down
2 changes: 2 additions & 0 deletions sound/soc/codecs/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -251,6 +251,7 @@ snd-soc-twl6040-objs := twl6040.o
snd-soc-uda1334-objs := uda1334.o
snd-soc-uda134x-objs := uda134x.o
snd-soc-uda1380-objs := uda1380.o
snd-soc-wcd-mbhc-objs := wcd-mbhc-v2.o
snd-soc-wcd9335-objs := wcd-clsh-v2.o wcd9335.o
snd-soc-wcd934x-objs := wcd-clsh-v2.o wcd934x.o
snd-soc-wl1273-objs := wl1273.o
Expand Down Expand Up @@ -574,6 +575,7 @@ obj-$(CONFIG_SND_SOC_TWL6040) += snd-soc-twl6040.o
obj-$(CONFIG_SND_SOC_UDA1334) += snd-soc-uda1334.o
obj-$(CONFIG_SND_SOC_UDA134X) += snd-soc-uda134x.o
obj-$(CONFIG_SND_SOC_UDA1380) += snd-soc-uda1380.o
obj-$(CONFIG_SND_SOC_WCD_MBHC) += snd-soc-wcd-mbhc.o
obj-$(CONFIG_SND_SOC_WCD9335) += snd-soc-wcd9335.o
obj-$(CONFIG_SND_SOC_WCD934X) += snd-soc-wcd934x.o
obj-$(CONFIG_SND_SOC_WL1273) += snd-soc-wl1273.o
Expand Down
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