perf-urgent-2021-08-08

 - Correct the permission checks for perf event which send SIGTRAP to a
   different process and clean up that code to be more readable.

 - Prevent an out of bound MSR access in the x86 perf code which happened
   due to an incomplete limiting to the actually available hardware
   counters.

 - Prevent access to the AMD64_EVENTSEL_HOSTONLY bit when running inside a
   guest.

 - Handle small core counter re-enabling correctly by issuing an ACK right
   before reenabling it to prevent a stale PEBS record being kept around.