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yaml
---
r: 313793
b: refs/heads/master
c: f100625
h: refs/heads/master
i:
  313791: a2693bf
v: v3
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Chris Metcalf committed Jul 18, 2012
1 parent ba1ac68 commit 1a8af2d
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Showing 3 changed files with 12 additions and 4 deletions.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: 47fc28bff82a4dd5f6b41c97e335d10fc78a8e9a
refs/heads/master: f1006257893917dfb1e0d74cb47b18c0e2908693
6 changes: 6 additions & 0 deletions trunk/arch/tile/Kconfig
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Expand Up @@ -406,6 +406,12 @@ config TILE_USB
Provides USB host adapter support for the built-in EHCI and OHCI
interfaces on TILE-Gx chips.

# USB OHCI needs the bounce pool since tilegx will often have more
# than 4GB of memory, but we don't currently use the IOTLB to present
# a 32-bit address to OHCI. So we need to use a bounce pool instead.
config NEED_BOUNCE_POOL
def_bool USB_OHCI_HCD

config HOTPLUG
bool "Support for hot-pluggable devices"
---help---
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8 changes: 5 additions & 3 deletions trunk/mm/bounce.c
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Expand Up @@ -24,23 +24,25 @@

static mempool_t *page_pool, *isa_page_pool;

#ifdef CONFIG_HIGHMEM
#if defined(CONFIG_HIGHMEM) || defined(CONFIG_NEED_BOUNCE_POOL)
static __init int init_emergency_pool(void)
{
#ifndef CONFIG_MEMORY_HOTPLUG
#if defined(CONFIG_HIGHMEM) && !defined(CONFIG_MEMORY_HOTPLUG)
if (max_pfn <= max_low_pfn)
return 0;
#endif

page_pool = mempool_create_page_pool(POOL_SIZE, 0);
BUG_ON(!page_pool);
printk("highmem bounce pool size: %d pages\n", POOL_SIZE);
printk("bounce pool size: %d pages\n", POOL_SIZE);

return 0;
}

__initcall(init_emergency_pool);
#endif

#ifdef CONFIG_HIGHMEM
/*
* highmem version, map in to vec
*/
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