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r: 344302
b: refs/heads/master
c: 86b7d3f
h: refs/heads/master
v: v3
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Jason Cooper committed Nov 21, 2012
1 parent 1ec7312 commit 5438a5f
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2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: 45f5984a8a528f7507f3ec860d297934d4449ad1
refs/heads/master: 86b7d3f7797908914735da83eb30df9d81fbd50a
40 changes: 40 additions & 0 deletions trunk/Documentation/devicetree/bindings/dma/mv-xor.txt
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* Marvell XOR engines

Required properties:
- compatible: Should be "marvell,orion-xor"
- reg: Should contain registers location and length (two sets)
the first set is the low registers, the second set the high
registers for the XOR engine.
- clocks: pointer to the reference clock

The DT node must also contains sub-nodes for each XOR channel that the
XOR engine has. Those sub-nodes have the following required
properties:
- interrupts: interrupt of the XOR channel

And the following optional properties:
- dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations
- dmacap,memset to indicate that the XOR channel is capable of memset operations
- dmacap,xor to indicate that the XOR channel is capable of xor operations

Example:

xor@d0060900 {
compatible = "marvell,orion-xor";
reg = <0xd0060900 0x100
0xd0060b00 0x100>;
clocks = <&coreclk 0>;
status = "okay";

xor00 {
interrupts = <51>;
dmacap,memcpy;
dmacap,xor;
};
xor01 {
interrupts = <52>;
dmacap,memcpy;
dmacap,xor;
dmacap,memset;
};
};
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* Marvell Armada 370 / Armada XP Ethernet Controller (NETA)

Required properties:
- compatible: should be "marvell,armada-370-neta".
- reg: address and length of the register set for the device.
- interrupts: interrupt for the device
- phy: A phandle to a phy node defining the PHY address (as the reg
property, a single integer).
- phy-mode: The interface between the SoC and the PHY (a string that
of_get_phy_mode() can understand)
- clocks: a pointer to the reference clock for this device.

Example:

ethernet@d0070000 {
compatible = "marvell,armada-370-neta";
reg = <0xd0070000 0x2500>;
interrupts = <8>;
clocks = <&gate_clk 4>;
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
35 changes: 35 additions & 0 deletions trunk/Documentation/devicetree/bindings/net/marvell-orion-mdio.txt
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* Marvell MDIO Ethernet Controller interface

The Ethernet controllers of the Marvel Kirkwood, Dove, Orion5x,
MV78xx0, Armada 370 and Armada XP have an identical unit that provides
an interface with the MDIO bus. This driver handles this MDIO
interface.

Required properties:
- compatible: "marvell,orion-mdio"
- reg: address and length of the SMI register

The child nodes of the MDIO driver are the individual PHY devices
connected to this MDIO bus. They must have a "reg" property given the
PHY address on the MDIO bus.

Example at the SoC level:

mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
reg = <0xd0072004 0x4>;
};

And at the board level:

mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};

phy1: ethernet-phy@1 {
reg = <1>;
};
}
6 changes: 6 additions & 0 deletions trunk/MAINTAINERS
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Expand Up @@ -4749,6 +4749,12 @@ S: Maintained
F: drivers/net/ethernet/marvell/mv643xx_eth.*
F: include/linux/mv643xx.h

MARVELL MVNETA ETHERNET DRIVER
M: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/ethernet/marvell/mvneta.*

MARVELL MWIFIEX WIRELESS DRIVER
M: Bing Zhao <bzhao@marvell.com>
L: linux-wireless@vger.kernel.org
Expand Down
4 changes: 3 additions & 1 deletion trunk/arch/arm/boot/dts/Makefile
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Expand Up @@ -44,7 +44,9 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \
dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
msm8960-cdp.dtb
dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
armada-xp-db.dtb
armada-370-mirabox.dtb \
armada-xp-db.dtb \
armada-xp-openblocks-ax3-4.dtb
dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \
imx53-ard.dtb \
imx53-evk.dtb \
Expand Down
25 changes: 25 additions & 0 deletions trunk/arch/arm/boot/dts/armada-370-db.dts
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Expand Up @@ -34,5 +34,30 @@
clock-frequency = <200000000>;
status = "okay";
};
sata@d00a0000 {
nr-ports = <2>;
status = "okay";
};

mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};

phy1: ethernet-phy@1 {
reg = <1>;
};
};

ethernet@d0070000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@d0074000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
};
};
56 changes: 56 additions & 0 deletions trunk/arch/arm/boot/dts/armada-370-mirabox.dts
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/*
* Device Tree file for Globalscale Mirabox
*
* Gregory CLEMENT <gregory.clement@free-electrons.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/

/dts-v1/;
/include/ "armada-370.dtsi"

/ {
model = "Globalscale Mirabox";
compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp";

chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
};

memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};

soc {
serial@d0012000 {
clock-frequency = <200000000>;
status = "okay";
};
timer@d0020300 {
clock-frequency = <600000000>;
status = "okay";
};
mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};

phy1: ethernet-phy@1 {
reg = <1>;
};
};
ethernet@d0070000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@d0074000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
};
};
32 changes: 32 additions & 0 deletions trunk/arch/arm/boot/dts/armada-370-xp.dtsi
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Expand Up @@ -74,6 +74,38 @@
compatible = "marvell,armada-addr-decoding-controller";
reg = <0xd0020000 0x258>;
};

sata@d00a0000 {
compatible = "marvell,orion-sata";
reg = <0xd00a0000 0x2400>;
interrupts = <55>;
clocks = <&gateclk 15>, <&gateclk 30>;
clock-names = "0", "1";
status = "disabled";
};

mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
reg = <0xd0072004 0x4>;
};

ethernet@d0070000 {
compatible = "marvell,armada-370-neta";
reg = <0xd0070000 0x2500>;
interrupts = <8>;
clocks = <&gateclk 4>;
status = "disabled";
};

ethernet@d0074000 {
compatible = "marvell,armada-370-neta";
reg = <0xd0074000 0x2500>;
interrupts = <10>;
clocks = <&gateclk 3>;
status = "disabled";
};
};
};

36 changes: 36 additions & 0 deletions trunk/arch/arm/boot/dts/armada-370.dtsi
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Expand Up @@ -89,6 +89,42 @@
#clock-cells = <1>;
};

xor@d0060800 {
compatible = "marvell,orion-xor";
reg = <0xd0060800 0x100
0xd0060A00 0x100>;
status = "okay";

xor00 {
interrupts = <51>;
dmacap,memcpy;
dmacap,xor;
};
xor01 {
interrupts = <52>;
dmacap,memcpy;
dmacap,xor;
dmacap,memset;
};
};

xor@d0060900 {
compatible = "marvell,orion-xor";
reg = <0xd0060900 0x100
0xd0060b00 0x100>;
status = "okay";

xor10 {
interrupts = <94>;
dmacap,memcpy;
dmacap,xor;
};
xor11 {
interrupts = <95>;
dmacap,memcpy;
dmacap,xor;
dmacap,memset;
};
};
};
};
43 changes: 43 additions & 0 deletions trunk/arch/arm/boot/dts/armada-xp-db.dts
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Expand Up @@ -46,5 +46,48 @@
clock-frequency = <250000000>;
status = "okay";
};
sata@d00a0000 {
nr-ports = <2>;
status = "okay";
};

mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};

phy1: ethernet-phy@1 {
reg = <1>;
};

phy2: ethernet-phy@2 {
reg = <25>;
};

phy3: ethernet-phy@3 {
reg = <27>;
};
};

ethernet@d0070000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@d0074000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
ethernet@d0030000 {
status = "okay";
phy = <&phy2>;
phy-mode = "sgmii";
};
ethernet@d0034000 {
status = "okay";
phy = <&phy3>;
phy-mode = "sgmii";
};
};
};
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