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[MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle committed Nov 30, 2006
1 parent 0550d9d commit 617667b
Showing 1 changed file with 7 additions and 3 deletions.
10 changes: 7 additions & 3 deletions arch/mips/mm/c-r4k.c
Original file line number Diff line number Diff line change
Expand Up @@ -381,17 +381,21 @@ static inline void local_r4k_flush_cache_mm(void * args)
if (!cpu_context(smp_processor_id(), mm))
return;

r4k_blast_dcache();

/*
* Kludge alert. For obscure reasons R4000SC and R4400SC go nuts if we
* only flush the primary caches but R10000 and R12000 behave sane ...
* R4000SC and R4400SC indexed S-cache ops also invalidate primary
* caches, so we can bail out early.
*/
if (current_cpu_data.cputype == CPU_R4000SC ||
current_cpu_data.cputype == CPU_R4000MC ||
current_cpu_data.cputype == CPU_R4400SC ||
current_cpu_data.cputype == CPU_R4400MC)
current_cpu_data.cputype == CPU_R4400MC) {
r4k_blast_scache();
return;
}

r4k_blast_dcache();
}

static void r4k_flush_cache_mm(struct mm_struct *mm)
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