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yaml
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r: 268275
b: refs/heads/master
c: b84981c
h: refs/heads/master
i:
  268273: 74d3448
  268271: 2e0dc19
v: v3
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Mark Einon authored and Greg Kroah-Hartman committed Sep 6, 2011
1 parent c488174 commit 67a0836
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Showing 2 changed files with 6 additions and 30 deletions.
2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: 46df22bd12c8ed6dc16a515ff7fea27464ffa589
refs/heads/master: b84981c80847999c23a87b9e6810978ccf14f14e
34 changes: 5 additions & 29 deletions trunk/drivers/staging/et131x/et1310_phy.h
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Expand Up @@ -61,6 +61,11 @@

#include "et1310_address_map.h"

/*
* Defines for generic MII registers 0x00 -> 0x0F can be found in
* include/linux/mii.h
*/

/* some defines for modem registers that seem to be 'reserved' */
#define PHY_INDEX_REG 0x10
#define PHY_DATA_REG 0x11
Expand All @@ -80,35 +85,6 @@
/* TRU_VMI_LINK_CONTROL_REG 29 */
/* TRU_VMI_TIMING_CONTROL_REG */

/* PHY Register Mapping(MI) Management Interface Regs */
struct mi_regs {
u8 bmcr; /* Basic mode control reg(Reg 0x00) */
u8 bmsr; /* Basic mode status reg(Reg 0x01) */
u8 idr1; /* Phy identifier reg 1(Reg 0x02) */
u8 idr2; /* Phy identifier reg 2(Reg 0x03) */
u8 anar; /* Auto-Negotiation advertisement(Reg 0x04) */
u8 anlpar; /* Auto-Negotiation link Partner Ability(Reg 0x05) */
u8 aner; /* Auto-Negotiation expansion reg(Reg 0x06) */
u8 annptr; /* Auto-Negotiation next page transmit reg(Reg 0x07) */
u8 lpnpr; /* link partner next page reg(Reg 0x08) */
u8 gcr; /* Gigabit basic mode control reg(Reg 0x09) */
u8 gsr; /* Gigabit basic mode status reg(Reg 0x0A) */
u8 mi_res1[4]; /* Future use by MI working group(Reg 0x0B - 0x0E) */
u8 esr; /* Extended status reg(Reg 0x0F) */
u8 mi_res2[3]; /* Future use by MI working group(Reg 0x10 - 0x12) */
u8 loop_ctl; /* Loopback Control Reg(Reg 0x13) */
u8 mi_res3; /* Future use by MI working group(Reg 0x14) */
u8 mcr; /* MI Control Reg(Reg 0x15) */
u8 pcr; /* Configuration Reg(Reg 0x16) */
u8 phy_ctl; /* PHY Control Reg(Reg 0x17) */
u8 imr; /* Interrupt Mask Reg(Reg 0x18) */
u8 isr; /* Interrupt Status Reg(Reg 0x19) */
u8 psr; /* PHY Status Reg(Reg 0x1A) */
u8 lcr1; /* LED Control 1 Reg(Reg 0x1B) */
u8 lcr2; /* LED Control 2 Reg(Reg 0x1C) */
u8 mi_res4[3]; /* Future use by MI working group(Reg 0x1D - 0x1F) */
};

/* MI Register 10: Gigabit basic mode status reg(Reg 0x0A) */
#define ET_1000BT_MSTR_SLV 0x4000

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