---

yaml
---
r: 314159
b: refs/heads/master
c: 16ea473
h: refs/heads/master
i:
  314157: ba67237
  314155: 631d0ba
  314151: 3e0ab78
  314143: c6aa33a
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 73395a79df00c3e0101bd7a0229dbbcc065b606a
+refs/heads/master: 16ea4733210d741eeb5413acd261e675a12f980e

trunk/drivers/net/wireless/ti/wl18xx/conf.h

@@ -44,6 +44,10 @@ struct wl18xx_conf_phy {
 	u8 clock_valid_on_wake_up;
 	u8 secondary_clock_setting_time;
 	u8 pwr_limit_reference_11_abg;
+	u8 psat;
+	s8 low_power_val;
+	s8 med_power_val;
+	s8 high_power_val;
 };
 
 struct wl18xx_priv_conf {

trunk/drivers/net/wireless/ti/wl18xx/main.c

@@ -511,6 +511,10 @@ static struct wl18xx_priv_conf wl18xx_default_priv_conf = {
 		.enable_tx_low_pwr_on_siso_rdl	= 0x00,
 		.rx_profile			= 0x00,
 		.pwr_limit_reference_11_abg	= 0xc8,
+		.psat				= 0,
+		.low_power_val			= 0x00,
+		.med_power_val			= 0x0a,
+		.high_power_val			= 0x1e,
 	},
 };
 
@@ -713,6 +717,7 @@ static void wl18xx_set_mac_and_phy(struct wl1271 *wl)
 	struct wl18xx_priv *priv = wl->priv;
 	struct wl18xx_conf_phy *phy = &priv->conf.phy;
 	struct wl18xx_mac_and_phy_params params;
+	size_t len;
 
 	memset(&params, 0, sizeof(params));
 
@@ -752,9 +757,21 @@ static void wl18xx_set_mac_and_phy(struct wl1271 *wl)
 
 	params.board_type = priv->board_type;
 
+	/* for PG2 only */
+	params.psat = phy->psat;
+	params.low_power_val = phy->low_power_val;
+	params.med_power_val = phy->med_power_val;
+	params.high_power_val = phy->high_power_val;
+
+	/* the parameters struct is smaller for PG1 */
+	if (wl->chip.id == CHIP_ID_185x_PG10)
+		len = offsetof(struct wl18xx_mac_and_phy_params, psat) + 1;
+	else
+		len = sizeof(params);
+
 	wlcore_set_partition(wl, &wl->ptable[PART_PHY_INIT]);
 	wl1271_write(wl, WL18XX_PHY_INIT_MEM_ADDR, (u8 *)&params,
-		     sizeof(params), false);
+		     len, false);
 }
 
 static void wl18xx_enable_interrupts(struct wl1271 *wl)

trunk/drivers/net/wireless/ti/wl18xx/reg.h

@@ -236,6 +236,12 @@ struct wl18xx_mac_and_phy_params {
 	u8 clock_valid_on_wake_up;
 	u8 secondary_clock_setting_time;
 	u8 board_type;
+	/* enable point saturation */
+	u8 psat;
+	/* low/medium/high Tx power in dBm */
+	s8 low_power_val;
+	s8 med_power_val;
+	s8 high_power_val;
 	u8 padding[1];
 } __packed;