---

yaml
---
r: 218711
b: refs/heads/master
c: 0bc42d7
h: refs/heads/master
i:
  218709: 3302b88
  218707: 05a2042
  218703: c20cf45
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 86c0f935c1eee1d778b43895f80c9d27a896dfd9
+refs/heads/master: 0bc42d7fcb0acaab4202db97ff2de475424bf9b4

trunk/arch/mn10300/Kconfig

@@ -136,34 +136,7 @@ config FPU
 	default y
 	depends on MN10300_PROC_MN103E010
 
-choice
-	prompt "CPU Caching mode"
-	default MN10300_CACHE_WBACK
-	help
-	  This option determines the caching mode for the kernel.
-
-	  Write-Back caching mode involves the all reads and writes causing
-	  the affected cacheline to be read into the cache first before being
-	  operated upon. Memory is not then updated by a write until the cache
-	  is filled and a cacheline needs to be displaced from the cache to
-	  make room. Only at that point is it written back.
-
-	  Write-Through caching only fetches cachelines from memory on a
-	  read. Writes always get written directly to memory. If the affected
-	  cacheline is also in cache, it will be updated too.
-
-	  The final option is to turn of caching entirely.
-
-config MN10300_CACHE_WBACK
-	bool "Write-Back"
-
-config MN10300_CACHE_WTHRU
-	bool "Write-Through"
-
-config MN10300_CACHE_DISABLED
-	bool "Disabled"
-
-endchoice
+source "arch/mn10300/mm/Kconfig.cache"
 
 menu "Memory layout options"
 

trunk/arch/mn10300/mm/Kconfig.cache

@@ -0,0 +1,32 @@
+#
+# MN10300 CPU cache options
+#
+
+choice
+	prompt "CPU Caching mode"
+	default MN10300_CACHE_WBACK
+	help
+	  This option determines the caching mode for the kernel.
+
+	  Write-Back caching mode involves the all reads and writes causing
+	  the affected cacheline to be read into the cache first before being
+	  operated upon. Memory is not then updated by a write until the cache
+	  is filled and a cacheline needs to be displaced from the cache to
+	  make room. Only at that point is it written back.
+
+	  Write-Through caching only fetches cachelines from memory on a
+	  read. Writes always get written directly to memory. If the affected
+	  cacheline is also in cache, it will be updated too.
+
+	  The final option is to turn of caching entirely.
+
+config MN10300_CACHE_WBACK
+	bool "Write-Back"
+
+config MN10300_CACHE_WTHRU
+	bool "Write-Through"
+
+config MN10300_CACHE_DISABLED
+	bool "Disabled"
+
+endchoice