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Mark Brown
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--- | ||
refs/heads/master: 5f3d25c08dee44a40229f1f9e8934f3217478a67 | ||
refs/heads/master: 63ddcd7ba5245b099531389fdfbac859888b0ce1 |
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47 changes: 47 additions & 0 deletions
47
trunk/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt
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CSR SiRFprimaII pinmux controller | ||
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Required properties: | ||
- compatible : "sirf,prima2-pinctrl" | ||
- reg : Address range of the pinctrl registers | ||
- interrupts : Interrupts used by every GPIO group | ||
- gpio-controller : Indicates this device is a GPIO controller | ||
- interrupt-controller : Marks the device node as an interrupt controller | ||
Optional properties: | ||
- sirf,pullups : if n-th bit of m-th bank is set, set a pullup on GPIO-n of bank m | ||
- sirf,pulldowns : if n-th bit of m-th bank is set, set a pulldown on GPIO-n of bank m | ||
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Please refer to pinctrl-bindings.txt in this directory for details of the common | ||
pinctrl bindings used by client devices. | ||
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SiRFprimaII's pinmux nodes act as a container for an abitrary number of subnodes. | ||
Each of these subnodes represents some desired configuration for a group of pins. | ||
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Required subnode-properties: | ||
- sirf,pins : An array of strings. Each string contains the name of a group. | ||
- sirf,function: A string containing the name of the function to mux to the | ||
group. | ||
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Valid values for group and function names can be found from looking at the | ||
group and function arrays in driver files: | ||
drivers/pinctrl/pinctrl-sirf.c | ||
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For example, pinctrl might have subnodes like the following: | ||
uart2_pins_a: uart2@0 { | ||
uart { | ||
sirf,pins = "uart2grp"; | ||
sirf,function = "uart2"; | ||
}; | ||
}; | ||
uart2_noflow_pins_a: uart2@1 { | ||
uart { | ||
sirf,pins = "uart2_nostreamctrlgrp"; | ||
sirf,function = "uart2_nostreamctrl"; | ||
}; | ||
}; | ||
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For a specific board, if it wants to use uart2 without hardware flow control, | ||
it can add the following to its board-specific .dts file. | ||
uart2: uart@0xb0070000 { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&uart2_noflow_pins_a>; | ||
} |
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AK4642 I2C transmitter | ||
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This device supports I2C mode only. | ||
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Required properties: | ||
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- compatible : "asahi-kasei,ak4642" or "asahi-kasei,ak4643" or "asahi-kasei,ak4648" | ||
- reg : The chip select number on the I2C bus | ||
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Example: | ||
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&i2c { | ||
ak4648: ak4648@0x12 { | ||
compatible = "asahi-kasei,ak4642"; | ||
reg = <0x12>; | ||
}; | ||
}; |
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51 changes: 51 additions & 0 deletions
51
trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt
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NVIDIA Tegra audio complex | ||
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Required properties: | ||
- compatible : "nvidia,tegra-audio-wm9712" | ||
- nvidia,model : The user-visible name of this sound complex. | ||
- nvidia,audio-routing : A list of the connections between audio components. | ||
Each entry is a pair of strings, the first being the connection's sink, | ||
the second being the connection's source. Valid names for sources and | ||
sinks are the WM9712's pins, and the jacks on the board: | ||
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WM9712 pins: | ||
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* MONOOUT | ||
* HPOUTL | ||
* HPOUTR | ||
* LOUT2 | ||
* ROUT2 | ||
* OUT3 | ||
* LINEINL | ||
* LINEINR | ||
* PHONE | ||
* PCBEEP | ||
* MIC1 | ||
* MIC2 | ||
* Mic Bias | ||
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Board connectors: | ||
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* Headphone | ||
* LineIn | ||
* Mic | ||
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- nvidia,ac97-controller : The phandle of the Tegra AC97 controller | ||
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Example: | ||
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sound { | ||
compatible = "nvidia,tegra-audio-wm9712-colibri_t20", | ||
"nvidia,tegra-audio-wm9712"; | ||
nvidia,model = "Toradex Colibri T20"; | ||
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nvidia,audio-routing = | ||
"Headphone", "HPOUTL", | ||
"Headphone", "HPOUTR", | ||
"LineIn", "LINEINL", | ||
"LineIn", "LINEINR", | ||
"Mic", "MIC1"; | ||
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nvidia,ac97-controller = <&ac97>; | ||
}; |
22 changes: 22 additions & 0 deletions
22
trunk/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
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NVIDIA Tegra 20 AC97 controller | ||
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Required properties: | ||
- compatible : "nvidia,tegra20-ac97" | ||
- reg : Should contain AC97 controller registers location and length | ||
- interrupts : Should contain AC97 interrupt | ||
- nvidia,dma-request-selector : The Tegra DMA controller's phandle and | ||
request selector for the AC97 controller | ||
- nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number | ||
of the GPIO used to reset the external AC97 codec | ||
- nvidia,codec-sync-gpio : The Tegra GPIO controller's phandle and the number | ||
of the GPIO corresponding with the AC97 DAP _FS line | ||
Example: | ||
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ac97@70002000 { | ||
compatible = "nvidia,tegra20-ac97"; | ||
reg = <0x70002000 0x200>; | ||
interrupts = <0 81 0x04>; | ||
nvidia,dma-request-selector = <&apbdma 12>; | ||
nvidia,codec-reset-gpio = <&gpio 170 0>; | ||
nvidia,codec-sync-gpio = <&gpio 120 0>; | ||
}; |
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