---

yaml
---
r: 345396
b: refs/heads/master
c: 82d23ae
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 6c1689a08cf54e58c19eb565528a293f36f731be
+refs/heads/master: 82d23aea108886c869fce4c1e3178db5f57b6e9c

trunk/drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c

@@ -23,13 +23,35 @@
  */
 
 #include <core/device.h>
+#include <core/gpuobj.h>
+#include <core/class.h>
 
+#include <subdev/fb.h>
 #include <engine/dmaobj.h>
 
 struct nvc0_dmaeng_priv {
 	struct nouveau_dmaeng base;
 };
 
+static int
+nvc0_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
+		 struct nouveau_object *parent,
+		 struct nouveau_dmaobj *dmaobj,
+		 struct nouveau_gpuobj **pgpuobj)
+{
+	int ret = 0;
+
+	if (!nv_iclass(parent, NV_ENGCTX_CLASS)) {
+		switch (nv_mclass(parent->parent)) {
+		default:
+			return -EINVAL;
+		}
+	} else
+		return 0;
+
+	return ret;
+}
+
 static int
 nvc0_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 		 struct nouveau_oclass *oclass, void *data, u32 size,
@@ -44,6 +66,7 @@ nvc0_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 		return ret;
 
 	nv_engine(priv)->sclass = nouveau_dmaobj_sclass;
+	priv->base.bind = nvc0_dmaobj_bind;
 	return 0;
 }
 

trunk/drivers/gpu/drm/nouveau/core/engine/fifo/base.c

@@ -64,12 +64,9 @@ nouveau_fifo_channel_create_(struct nouveau_object *parent,
 		return -EINVAL;
 	}
 
-	if (dmaeng->bind) {
-		ret = dmaeng->bind(dmaeng, parent, chan->pushdma,
-				  &chan->pushgpu);
-		if (ret)
-			return ret;
-	}
+	ret = dmaeng->bind(dmaeng, parent, chan->pushdma, &chan->pushgpu);
+	if (ret)
+		return ret;
 
 	/* find a free fifo channel */
 	spin_lock_irqsave(&priv->lock, flags);