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yaml
---
r: 59236
b: refs/heads/master
c: 4ad48b4
h: refs/heads/master
v: v3
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Vladimir Barinov authored and Russell King committed Jul 12, 2007
1 parent e75be22 commit ca4eda1
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Showing 4 changed files with 106 additions and 28 deletions.
2 changes: 1 addition & 1 deletion [refs]
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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 51198ea9478b6e10759ab07cd0b9917663c8df7a
refs/heads/master: 4ad48b4bfa121a67ec04162d584afcfa75ed151a
32 changes: 5 additions & 27 deletions trunk/arch/arm/mach-iop13xx/tpmi.c
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Original file line number Diff line number Diff line change
Expand Up @@ -29,15 +29,13 @@
#define IOP13XX_TPMI_MMR(dev) IOP13XX_REG_ADDR32_PHYS(0x48000 + (dev << 12))
#define IOP13XX_TPMI_MEM(dev) IOP13XX_REG_ADDR32_PHYS(0x60000 + (dev << 13))
#define IOP13XX_TPMI_CTRL(dev) IOP13XX_REG_ADDR32_PHYS(0x50000 + (dev << 10))
#define IOP13XX_TPMI_IOP_CTRL(dev) (IOP13XX_TPMI_CTRL(dev) + 0x2000)
#define IOP13XX_TPMI_MMR_SIZE (SZ_4K - 1)
#define IOP13XX_TPMI_MEM_SIZE (255)
#define IOP13XX_TPMI_MEM_CTRL (SZ_1K - 1)
#define IOP13XX_TPMI_RESOURCE_MMR 0
#define IOP13XX_TPMI_RESOURCE_MEM 1
#define IOP13XX_TPMI_RESOURCE_CTRL 2
#define IOP13XX_TPMI_RESOURCE_IOP_CTRL 3
#define IOP13XX_TPMI_RESOURCE_IRQ 4
#define IOP13XX_TPMI_RESOURCE_IRQ 3

static struct resource iop13xx_tpmi_0_resources[] = {
[IOP13XX_TPMI_RESOURCE_MMR] = {
Expand All @@ -55,11 +53,6 @@ static struct resource iop13xx_tpmi_0_resources[] = {
.end = IOP13XX_TPMI_CTRL(0) + IOP13XX_TPMI_MEM_CTRL,
.flags = IORESOURCE_MEM,
},
[IOP13XX_TPMI_RESOURCE_IOP_CTRL] = {
.start = IOP13XX_TPMI_IOP_CTRL(0),
.end = IOP13XX_TPMI_IOP_CTRL(0) + IOP13XX_TPMI_MEM_CTRL,
.flags = IORESOURCE_MEM,
},
[IOP13XX_TPMI_RESOURCE_IRQ] = {
.start = IRQ_IOP13XX_TPMI0_OUT,
.end = IRQ_IOP13XX_TPMI0_OUT,
Expand All @@ -83,11 +76,6 @@ static struct resource iop13xx_tpmi_1_resources[] = {
.end = IOP13XX_TPMI_CTRL(1) + IOP13XX_TPMI_MEM_CTRL,
.flags = IORESOURCE_MEM,
},
[IOP13XX_TPMI_RESOURCE_IOP_CTRL] = {
.start = IOP13XX_TPMI_IOP_CTRL(1),
.end = IOP13XX_TPMI_IOP_CTRL(1) + IOP13XX_TPMI_MEM_CTRL,
.flags = IORESOURCE_MEM,
},
[IOP13XX_TPMI_RESOURCE_IRQ] = {
.start = IRQ_IOP13XX_TPMI1_OUT,
.end = IRQ_IOP13XX_TPMI1_OUT,
Expand All @@ -111,11 +99,6 @@ static struct resource iop13xx_tpmi_2_resources[] = {
.end = IOP13XX_TPMI_CTRL(2) + IOP13XX_TPMI_MEM_CTRL,
.flags = IORESOURCE_MEM,
},
[IOP13XX_TPMI_RESOURCE_IOP_CTRL] = {
.start = IOP13XX_TPMI_IOP_CTRL(2),
.end = IOP13XX_TPMI_IOP_CTRL(2) + IOP13XX_TPMI_MEM_CTRL,
.flags = IORESOURCE_MEM,
},
[IOP13XX_TPMI_RESOURCE_IRQ] = {
.start = IRQ_IOP13XX_TPMI2_OUT,
.end = IRQ_IOP13XX_TPMI2_OUT,
Expand All @@ -139,11 +122,6 @@ static struct resource iop13xx_tpmi_3_resources[] = {
.end = IOP13XX_TPMI_CTRL(3) + IOP13XX_TPMI_MEM_CTRL,
.flags = IORESOURCE_MEM,
},
[IOP13XX_TPMI_RESOURCE_IOP_CTRL] = {
.start = IOP13XX_TPMI_IOP_CTRL(3),
.end = IOP13XX_TPMI_IOP_CTRL(3) + IOP13XX_TPMI_MEM_CTRL,
.flags = IORESOURCE_MEM,
},
[IOP13XX_TPMI_RESOURCE_IRQ] = {
.start = IRQ_IOP13XX_TPMI3_OUT,
.end = IRQ_IOP13XX_TPMI3_OUT,
Expand All @@ -155,7 +133,7 @@ u64 iop13xx_tpmi_mask = DMA_64BIT_MASK;
static struct platform_device iop13xx_tpmi_0_device = {
.name = "iop-tpmi",
.id = 0,
.num_resources = ARRAY_SIZE(iop13xx_tpmi_0_resources),
.num_resources = 4,
.resource = iop13xx_tpmi_0_resources,
.dev = {
.dma_mask = &iop13xx_tpmi_mask,
Expand All @@ -166,7 +144,7 @@ static struct platform_device iop13xx_tpmi_0_device = {
static struct platform_device iop13xx_tpmi_1_device = {
.name = "iop-tpmi",
.id = 1,
.num_resources = ARRAY_SIZE(iop13xx_tpmi_1_resources),
.num_resources = 4,
.resource = iop13xx_tpmi_1_resources,
.dev = {
.dma_mask = &iop13xx_tpmi_mask,
Expand All @@ -177,7 +155,7 @@ static struct platform_device iop13xx_tpmi_1_device = {
static struct platform_device iop13xx_tpmi_2_device = {
.name = "iop-tpmi",
.id = 2,
.num_resources = ARRAY_SIZE(iop13xx_tpmi_2_resources),
.num_resources = 4,
.resource = iop13xx_tpmi_2_resources,
.dev = {
.dma_mask = &iop13xx_tpmi_mask,
Expand All @@ -188,7 +166,7 @@ static struct platform_device iop13xx_tpmi_2_device = {
static struct platform_device iop13xx_tpmi_3_device = {
.name = "iop-tpmi",
.id = 3,
.num_resources = ARRAY_SIZE(iop13xx_tpmi_3_resources),
.num_resources = 4,
.resource = iop13xx_tpmi_3_resources,
.dev = {
.dma_mask = &iop13xx_tpmi_mask,
Expand Down
96 changes: 96 additions & 0 deletions trunk/arch/arm/mach-ixp4xx/ixdp425-setup.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,10 @@
#include <linux/tty.h>
#include <linux/serial_8250.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>

#include <asm/types.h>
#include <asm/setup.h>
Expand All @@ -24,6 +28,7 @@
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/delay.h>

static struct flash_platform_data ixdp425_flash_data = {
.map_name = "cfi_probe",
Expand All @@ -44,6 +49,77 @@ static struct platform_device ixdp425_flash = {
.resource = &ixdp425_flash_resource,
};

#if defined(CONFIG_MTD_NAND_PLATFORM) || \
defined(CONFIG_MTD_NAND_PLATFORM_MODULE)

#ifdef CONFIG_MTD_PARTITIONS
const char *part_probes[] = { "cmdlinepart", NULL };

static struct mtd_partition ixdp425_partitions[] = {
{
.name = "ixp400 NAND FS 0",
.offset = 0,
.size = SZ_8M
}, {
.name = "ixp400 NAND FS 1",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL
},
};
#endif

static void
ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *this = mtd->priv;
int offset = (int)this->priv;

if (ctrl & NAND_CTRL_CHANGE) {
if (ctrl & NAND_NCE) {
gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_LOW);
udelay(5);
} else
gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_HIGH);

offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0;
offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0;
this->priv = (void *)offset;
}

if (cmd != NAND_CMD_NONE)
writeb(cmd, this->IO_ADDR_W + offset);
}

static struct platform_nand_data ixdp425_flash_nand_data = {
.chip = {
.chip_delay = 30,
.options = NAND_NO_AUTOINCR,
#ifdef CONFIG_MTD_PARTITIONS
.part_probe_types = part_probes,
.partitions = ixdp425_partitions,
.nr_partitions = ARRAY_SIZE(ixdp425_partitions),
#endif
},
.ctrl = {
.cmd_ctrl = ixdp425_flash_nand_cmd_ctrl
}
};

static struct resource ixdp425_flash_nand_resource = {
.flags = IORESOURCE_MEM,
};

static struct platform_device ixdp425_flash_nand = {
.name = "gen_nand",
.id = -1,
.dev = {
.platform_data = &ixdp425_flash_nand_data,
},
.num_resources = 1,
.resource = &ixdp425_flash_nand_resource,
};
#endif /* CONFIG_MTD_NAND_PLATFORM */

static struct ixp4xx_i2c_pins ixdp425_i2c_gpio_pins = {
.sda_pin = IXDP425_SDA_PIN,
.scl_pin = IXDP425_SCL_PIN,
Expand Down Expand Up @@ -104,6 +180,10 @@ static struct platform_device ixdp425_uart = {
static struct platform_device *ixdp425_devices[] __initdata = {
&ixdp425_i2c_controller,
&ixdp425_flash,
#if defined(CONFIG_MTD_NAND_PLATFORM) || \
defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
&ixdp425_flash_nand,
#endif
&ixdp425_uart
};

Expand All @@ -115,6 +195,22 @@ static void __init ixdp425_init(void)
ixdp425_flash_resource.end =
IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;

#if defined(CONFIG_MTD_NAND_PLATFORM) || \
defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3),
ixdp425_flash_nand_resource.end = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1;

gpio_line_config(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_OUT);

/* Configure expansion bus for NAND Flash */
*IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
IXP4XX_EXP_BUS_STROBE_T(1) | /* extend by 1 clock */
IXP4XX_EXP_BUS_CYCLES(0) | /* Intel cycles */
IXP4XX_EXP_BUS_SIZE(0) | /* 512bytes addr space*/
IXP4XX_EXP_BUS_WR_EN |
IXP4XX_EXP_BUS_BYTE_EN; /* 8 bit data bus */
#endif

if (cpu_is_ixp43x()) {
ixdp425_uart.num_resources = 1;
ixdp425_uart_data[1].flags = 0;
Expand Down
4 changes: 4 additions & 0 deletions trunk/include/asm-arm/arch-ixp4xx/ixdp425.h
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Original file line number Diff line number Diff line change
Expand Up @@ -32,4 +32,8 @@
#define IXDP425_PCI_INTC_PIN 9
#define IXDP425_PCI_INTD_PIN 8

/* NAND Flash pins */
#define IXDP425_NAND_NCE_PIN 12

#define IXDP425_NAND_CMD_BYTE 0x01
#define IXDP425_NAND_ADDR_BYTE 0x02

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