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yaml
---
r: 353471
b: refs/heads/master
c: 699ba45
h: refs/heads/master
i:
  353469: 9aaa935
  353467: 76c2fb5
  353463: 1e285c5
  353455: fed84b4
  353439: 7e5b0bd
  353407: a731ec7
v: v3
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Mark Brown committed Feb 11, 2013
1 parent 9d20160 commit cb8f757
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2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: 6757d8cc0c6ff2e61972d84797d358a2f69f2217
refs/heads/master: 699ba4546cfe3f4eee73aff4f307bf16362f9232
6 changes: 3 additions & 3 deletions trunk/Documentation/DocBook/media/v4l/driver.xml
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Expand Up @@ -116,15 +116,15 @@ my_suspend (struct pci_dev * pci_dev,
return 0; /* a negative value on error, 0 on success. */
}
static void __devexit
static void
my_remove (struct pci_dev * pci_dev)
{
my_device *my = pci_get_drvdata (pci_dev);
/* Describe me. */
}
static int __devinit
static int
my_probe (struct pci_dev * pci_dev,
const struct pci_device_id * pci_id)
{
Expand Down Expand Up @@ -157,7 +157,7 @@ my_pci_driver = {
.id_table = my_pci_device_ids,
.probe = my_probe,
.remove = __devexit_p (my_remove),
.remove = my_remove,
/* Power management functions. */
.suspend = my_suspend,
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6 changes: 3 additions & 3 deletions trunk/Documentation/PCI/pci-iov-howto.txt
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Expand Up @@ -76,7 +76,7 @@ To notify SR-IOV core of Virtual Function Migration:

Following piece of code illustrates the usage of the SR-IOV API.

static int __devinit dev_probe(struct pci_dev *dev, const struct pci_device_id *id)
static int dev_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
pci_enable_sriov(dev, NR_VIRTFN);

Expand All @@ -85,7 +85,7 @@ static int __devinit dev_probe(struct pci_dev *dev, const struct pci_device_id *
return 0;
}

static void __devexit dev_remove(struct pci_dev *dev)
static void dev_remove(struct pci_dev *dev)
{
pci_disable_sriov(dev);

Expand Down Expand Up @@ -131,7 +131,7 @@ static struct pci_driver dev_driver = {
.name = "SR-IOV Physical Function driver",
.id_table = dev_id_table,
.probe = dev_probe,
.remove = __devexit_p(dev_remove),
.remove = dev_remove,
.suspend = dev_suspend,
.resume = dev_resume,
.shutdown = dev_shutdown,
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20 changes: 0 additions & 20 deletions trunk/Documentation/PCI/pci.txt
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Expand Up @@ -183,33 +183,13 @@ Please mark the initialization and cleanup functions where appropriate
initializes.
__exit Exit code. Ignored for non-modular drivers.


__devinit Device initialization code.
Identical to __init if the kernel is not compiled
with CONFIG_HOTPLUG, normal function otherwise.
__devexit The same for __exit.

Tips on when/where to use the above attributes:
o The module_init()/module_exit() functions (and all
initialization functions called _only_ from these)
should be marked __init/__exit.

o Do not mark the struct pci_driver.

o The ID table array should be marked __devinitconst; this is done
automatically if the table is declared with DEFINE_PCI_DEVICE_TABLE().

o The probe() and remove() functions should be marked __devinit
and __devexit respectively. All initialization functions
exclusively called by the probe() routine, can be marked __devinit.
Ditto for remove() and __devexit.

o If mydriver_remove() is marked with __devexit(), then all address
references to mydriver_remove must use __devexit_p(mydriver_remove)
(in the struct pci_driver declaration for example).
__devexit_p() will generate the function name _or_ NULL if the
function will be discarded. For an example, see drivers/net/tg3.c.

o Do NOT mark a function if you are not sure which mark to use.
Better to not mark the function than mark the function wrong.

Expand Down
2 changes: 1 addition & 1 deletion trunk/Documentation/acpi/enumeration.txt
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Expand Up @@ -185,7 +185,7 @@ input driver:
.acpi_match_table ACPI_PTR(mpu3050_acpi_match),
},
.probe = mpu3050_probe,
.remove = __devexit_p(mpu3050_remove),
.remove = mpu3050_remove,
.id_table = mpu3050_ids,
};

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1 change: 1 addition & 0 deletions trunk/Documentation/device-mapper/dm-raid.txt
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Expand Up @@ -141,3 +141,4 @@ Version History
1.2.0 Handle creation of arrays that contain failed devices.
1.3.0 Added support for RAID 10
1.3.1 Allow device replacement/rebuild for RAID 10
1.3.2 Fix/improve redundancy checking for RAID10
5 changes: 0 additions & 5 deletions trunk/Documentation/devicetree/bindings/clock/imx23-clock.txt
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Expand Up @@ -60,11 +60,6 @@ clks: clkctrl@80040000 {
compatible = "fsl,imx23-clkctrl";
reg = <0x80040000 0x2000>;
#clock-cells = <1>;
clock-output-names =
...
"uart", /* 32 */
...
"end_of_list";
};

auart0: serial@8006c000 {
Expand Down
4 changes: 0 additions & 4 deletions trunk/Documentation/devicetree/bindings/clock/imx25-clock.txt
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Expand Up @@ -146,10 +146,6 @@ clks: ccm@53f80000 {
compatible = "fsl,imx25-ccm";
reg = <0x53f80000 0x4000>;
interrupts = <31>;
clock-output-names = ...
"uart_ipg",
"uart_serial",
...;
};

uart1: serial@43f90000 {
Expand Down
5 changes: 0 additions & 5 deletions trunk/Documentation/devicetree/bindings/clock/imx28-clock.txt
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Expand Up @@ -83,11 +83,6 @@ clks: clkctrl@80040000 {
compatible = "fsl,imx28-clkctrl";
reg = <0x80040000 0x2000>;
#clock-cells = <1>;
clock-output-names =
...
"uart", /* 45 */
...
"end_of_list";
};

auart0: serial@8006a000 {
Expand Down
4 changes: 0 additions & 4 deletions trunk/Documentation/devicetree/bindings/clock/imx6q-clock.txt
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Expand Up @@ -211,10 +211,6 @@ clks: ccm@020c4000 {
reg = <0x020c4000 0x4000>;
interrupts = <0 87 0x04 0 88 0x04>;
#clock-cells = <1>;
clock-output-names = ...
"uart_ipg",
"uart_serial",
...;
};

uart1: serial@02020000 {
Expand Down
20 changes: 17 additions & 3 deletions trunk/Documentation/devicetree/bindings/gpio/gpio-poweroff.txt
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@@ -1,4 +1,19 @@
GPIO line that should be set high/low to power off a device
Driver a GPIO line that can be used to turn the power off.

The driver supports both level triggered and edge triggered power off.
At driver load time, the driver will request the given gpio line and
install a pm_power_off handler. If the optional properties 'input' is
not found, the GPIO line will be driven in the inactive
state. Otherwise its configured as an input.

When the pm_power_off is called, the gpio is configured as an output,
and drive active, so triggering a level triggered power off
condition. This will also cause an inactive->active edge condition, so
triggering positive edge triggered power off. After a delay of 100ms,
the GPIO is set to inactive, thus causing an active->inactive edge,
triggering negative edge triggered power off. After another 100ms
delay the GPIO is driver active again. If the power is still on and
the CPU still running after a 3000ms delay, a WARN_ON(1) is emitted.

Required properties:
- compatible : should be "gpio-poweroff".
Expand All @@ -13,10 +28,9 @@ Optional properties:
property is not specified, the GPIO is initialized as an output in its
inactive state.


Examples:

gpio-poweroff {
compatible = "gpio-poweroff";
gpios = <&gpio 4 0>; /* GPIO 4 Active Low */
gpios = <&gpio 4 0>;
};
5 changes: 3 additions & 2 deletions trunk/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
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Expand Up @@ -81,7 +81,8 @@ PA31 TXD4
Required properties for pin configuration node:
- atmel,pins: 4 integers array, represents a group of pins mux and config
setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
The PERIPH 0 means gpio.
The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...

Bits used for CONFIG:
PULL_UP (1 << 0): indicate this pin need a pull up.
Expand Down Expand Up @@ -126,7 +127,7 @@ pinctrl@fffff400 {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<1 14 0x1 0x0 /* PB14 periph A */
1 15 0x1 0x1>; /* PB15 periph with pullup */
1 15 0x1 0x1>; /* PB15 periph A with pullup */
};
};
};
Expand Down
47 changes: 47 additions & 0 deletions trunk/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt
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CSR SiRFprimaII pinmux controller

Required properties:
- compatible : "sirf,prima2-pinctrl"
- reg : Address range of the pinctrl registers
- interrupts : Interrupts used by every GPIO group
- gpio-controller : Indicates this device is a GPIO controller
- interrupt-controller : Marks the device node as an interrupt controller
Optional properties:
- sirf,pullups : if n-th bit of m-th bank is set, set a pullup on GPIO-n of bank m
- sirf,pulldowns : if n-th bit of m-th bank is set, set a pulldown on GPIO-n of bank m

Please refer to pinctrl-bindings.txt in this directory for details of the common
pinctrl bindings used by client devices.

SiRFprimaII's pinmux nodes act as a container for an abitrary number of subnodes.
Each of these subnodes represents some desired configuration for a group of pins.

Required subnode-properties:
- sirf,pins : An array of strings. Each string contains the name of a group.
- sirf,function: A string containing the name of the function to mux to the
group.

Valid values for group and function names can be found from looking at the
group and function arrays in driver files:
drivers/pinctrl/pinctrl-sirf.c

For example, pinctrl might have subnodes like the following:
uart2_pins_a: uart2@0 {
uart {
sirf,pins = "uart2grp";
sirf,function = "uart2";
};
};
uart2_noflow_pins_a: uart2@1 {
uart {
sirf,pins = "uart2_nostreamctrlgrp";
sirf,function = "uart2_nostreamctrl";
};
};

For a specific board, if it wants to use uart2 without hardware flow control,
it can add the following to its board-specific .dts file.
uart2: uart@0xb0070000 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_noflow_pins_a>;
}
17 changes: 17 additions & 0 deletions trunk/Documentation/devicetree/bindings/sound/ak4642.txt
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@@ -0,0 +1,17 @@
AK4642 I2C transmitter

This device supports I2C mode only.

Required properties:

- compatible : "asahi-kasei,ak4642" or "asahi-kasei,ak4643" or "asahi-kasei,ak4648"
- reg : The chip select number on the I2C bus

Example:

&i2c {
ak4648: ak4648@0x12 {
compatible = "asahi-kasei,ak4642";
reg = <0x12>;
};
};
12 changes: 12 additions & 0 deletions trunk/Documentation/devicetree/bindings/sound/cs4271.txt
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Expand Up @@ -20,6 +20,18 @@ Optional properties:
!RESET pin
- cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag
is enabled.
- cirrus,enable-soft-reset:
The CS4271 requires its LRCLK and MCLK to be stable before its RESET
line is de-asserted. That also means that clocks cannot be changed
without putting the chip back into hardware reset, which also requires
a complete re-initialization of all registers.

One (undocumented) workaround is to assert and de-assert the PDN bit
in the MODE2 register. This workaround can be enabled with this DT
property.

Note that this is not needed in case the clocks are stable
throughout the entire runtime of the codec.

Examples:

Expand Down
51 changes: 51 additions & 0 deletions trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt
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@@ -0,0 +1,51 @@
NVIDIA Tegra audio complex

Required properties:
- compatible : "nvidia,tegra-audio-wm9712"
- nvidia,model : The user-visible name of this sound complex.
- nvidia,audio-routing : A list of the connections between audio components.
Each entry is a pair of strings, the first being the connection's sink,
the second being the connection's source. Valid names for sources and
sinks are the WM9712's pins, and the jacks on the board:

WM9712 pins:

* MONOOUT
* HPOUTL
* HPOUTR
* LOUT2
* ROUT2
* OUT3
* LINEINL
* LINEINR
* PHONE
* PCBEEP
* MIC1
* MIC2
* Mic Bias

Board connectors:

* Headphone
* LineIn
* Mic

- nvidia,ac97-controller : The phandle of the Tegra AC97 controller


Example:

sound {
compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
"nvidia,tegra-audio-wm9712";
nvidia,model = "Toradex Colibri T20";

nvidia,audio-routing =
"Headphone", "HPOUTL",
"Headphone", "HPOUTR",
"LineIn", "LINEINL",
"LineIn", "LINEINR",
"Mic", "MIC1";

nvidia,ac97-controller = <&ac97>;
};
22 changes: 22 additions & 0 deletions trunk/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
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NVIDIA Tegra 20 AC97 controller

Required properties:
- compatible : "nvidia,tegra20-ac97"
- reg : Should contain AC97 controller registers location and length
- interrupts : Should contain AC97 interrupt
- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
request selector for the AC97 controller
- nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number
of the GPIO used to reset the external AC97 codec
- nvidia,codec-sync-gpio : The Tegra GPIO controller's phandle and the number
of the GPIO corresponding with the AC97 DAP _FS line
Example:

ac97@70002000 {
compatible = "nvidia,tegra20-ac97";
reg = <0x70002000 0x200>;
interrupts = <0 81 0x04>;
nvidia,dma-request-selector = <&apbdma 12>;
nvidia,codec-reset-gpio = <&gpio 170 0>;
nvidia,codec-sync-gpio = <&gpio 120 0>;
};
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