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Merge branch 'tty-next' of git://git.kernel.org/pub/scm/linux/kernel/…
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…git/gregkh/tty-2.6

* 'tty-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6: (26 commits)
  amba pl011: workaround for uart registers lockup
  n_gsm: fix the wrong FCS handling
  pch_uart: add missing comment about OKI ML7223
  pch_uart: Add MSI support
  tty: fix "IRQ45: nobody cared"
  PTI feature to allow user to name and mark masterchannel request.
  0 for o PTI Makefile bug.
  tty: serial: samsung.c remove legacy PM code.
  SERIAL: SC26xx: Fix link error.
  serial: mrst_max3110: initialize waitqueue earlier
  mrst_max3110: Change max missing message priority.
  tty: s5pv210: Add delay loop on fifo reset function for UART
  tty/serial: Fix XSCALE serial ports, e.g. ce4100
  serial: bfin_5xx: fix off-by-one with resource size
  drivers/tty: use printk_ratelimited() instead of printk_ratelimit()
  tty: n_gsm: Added refcount usage to gsm_mux and gsm_dlci structs
  tty: n_gsm: Add raw-ip support
  tty: n_gsm: expose gsmtty device nodes at ldisc open time
  pch_phub: Fix register miss-setting issue
  serial: 8250, increase PASS_LIMIT
  ...
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Linus Torvalds committed Jul 26, 2011
2 parents f549953 + def90f4 commit d5ef642
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Showing 20 changed files with 903 additions and 187 deletions.
2 changes: 1 addition & 1 deletion drivers/misc/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ obj-$(CONFIG_IBM_ASM) += ibmasm/
obj-$(CONFIG_AD525X_DPOT) += ad525x_dpot.o
obj-$(CONFIG_AD525X_DPOT_I2C) += ad525x_dpot-i2c.o
obj-$(CONFIG_AD525X_DPOT_SPI) += ad525x_dpot-spi.o
0bj-$(CONFIG_INTEL_MID_PTI) += pti.o
obj-$(CONFIG_INTEL_MID_PTI) += pti.o
obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o
obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o
obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o
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4 changes: 2 additions & 2 deletions drivers/misc/pch_phub.c
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Original file line number Diff line number Diff line change
Expand Up @@ -735,6 +735,8 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev,
* Device8(GbE)
*/
iowrite32(0x000a0000, chip->pch_phub_base_address + 0x14);
/* set the interrupt delay value */
iowrite32(0x25, chip->pch_phub_base_address + 0x140);
chip->pch_opt_rom_start_address =\
PCH_PHUB_ROM_START_ADDR_ML7223;
chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223;
Expand All @@ -752,8 +754,6 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev,
* Device6(SATA 2):f
*/
iowrite32(0x0000ffa0, chip->pch_phub_base_address + 0x14);
/* set the interrupt delay value */
iowrite32(0x25, chip->pch_phub_base_address + 0x140);
chip->pch_opt_rom_start_address =\
PCH_PHUB_ROM_START_ADDR_ML7223;
chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223;
Expand Down
99 changes: 60 additions & 39 deletions drivers/misc/pti.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -146,45 +146,54 @@ static void pti_write_to_aperture(struct pti_masterchannel *mc,
/**
* pti_control_frame_built_and_sent()- control frame build and send function.
*
* @mc: The master / channel structure on which the function
* built a control frame.
* @mc: The master / channel structure on which the function
* built a control frame.
* @thread_name: The thread name associated with the master / channel or
* 'NULL' if using the 'current' global variable.
*
* To be able to post process the PTI contents on host side, a control frame
* is added before sending any PTI content. So the host side knows on
* each PTI frame the name of the thread using a dedicated master / channel.
* The thread name is retrieved from the 'current' global variable.
* The thread name is retrieved from 'current' global variable if 'thread_name'
* is 'NULL', else it is retrieved from 'thread_name' parameter.
* This function builds this frame and sends it to a master ID CONTROL_ID.
* The overhead is only 32 bytes since the driver only writes to HW
* in 32 byte chunks.
*/

static void pti_control_frame_built_and_sent(struct pti_masterchannel *mc)
static void pti_control_frame_built_and_sent(struct pti_masterchannel *mc,
const char *thread_name)
{
struct pti_masterchannel mccontrol = {.master = CONTROL_ID,
.channel = 0};
const char *thread_name_p;
const char *control_format = "%3d %3d %s";
u8 control_frame[CONTROL_FRAME_LEN];

/*
* Since we access the comm member in current's task_struct,
* we only need to be as large as what 'comm' in that
* structure is.
*/
char comm[TASK_COMM_LEN];
if (!thread_name) {
/*
* Since we access the comm member in current's task_struct,
* we only need to be as large as what 'comm' in that
* structure is.
*/
char comm[TASK_COMM_LEN];

if (!in_interrupt())
get_task_comm(comm, current);
else
strncpy(comm, "Interrupt", TASK_COMM_LEN);
if (!in_interrupt())
get_task_comm(comm, current);
else
strncpy(comm, "Interrupt", TASK_COMM_LEN);

/* Absolutely ensure our buffer is zero terminated. */
comm[TASK_COMM_LEN-1] = 0;
/* Absolutely ensure our buffer is zero terminated. */
comm[TASK_COMM_LEN-1] = 0;
thread_name_p = comm;
} else {
thread_name_p = thread_name;
}

mccontrol.channel = pti_control_channel;
pti_control_channel = (pti_control_channel + 1) & 0x7f;

snprintf(control_frame, CONTROL_FRAME_LEN, control_format, mc->master,
mc->channel, comm);
mc->channel, thread_name_p);
pti_write_to_aperture(&mccontrol, control_frame, strlen(control_frame));
}

Expand All @@ -206,18 +215,20 @@ static void pti_write_full_frame_to_aperture(struct pti_masterchannel *mc,
const unsigned char *buf,
int len)
{
pti_control_frame_built_and_sent(mc);
pti_control_frame_built_and_sent(mc, NULL);
pti_write_to_aperture(mc, (u8 *)buf, len);
}

/**
* get_id()- Allocate a master and channel ID.
*
* @id_array: an array of bits representing what channel
* id's are allocated for writing.
* @max_ids: The max amount of available write IDs to use.
* @base_id: The starting SW channel ID, based on the Intel
* PTI arch.
* @id_array: an array of bits representing what channel
* id's are allocated for writing.
* @max_ids: The max amount of available write IDs to use.
* @base_id: The starting SW channel ID, based on the Intel
* PTI arch.
* @thread_name: The thread name associated with the master / channel or
* 'NULL' if using the 'current' global variable.
*
* Returns:
* pti_masterchannel struct with master, channel ID address
Expand All @@ -227,7 +238,10 @@ static void pti_write_full_frame_to_aperture(struct pti_masterchannel *mc,
* channel id. The bit is one if the id is taken and 0 if free. For
* every master there are 128 channel id's.
*/
static struct pti_masterchannel *get_id(u8 *id_array, int max_ids, int base_id)
static struct pti_masterchannel *get_id(u8 *id_array,
int max_ids,
int base_id,
const char *thread_name)
{
struct pti_masterchannel *mc;
int i, j, mask;
Expand Down Expand Up @@ -257,7 +271,7 @@ static struct pti_masterchannel *get_id(u8 *id_array, int max_ids, int base_id)
mc->master = base_id;
mc->channel = ((i & 0xf)<<3) + j;
/* write new master Id / channel Id allocation to channel control */
pti_control_frame_built_and_sent(mc);
pti_control_frame_built_and_sent(mc, thread_name);
return mc;
}

Expand All @@ -273,18 +287,22 @@ static struct pti_masterchannel *get_id(u8 *id_array, int max_ids, int base_id)
* a master, channel ID address
* to write to PTI HW.
*
* @type: 0- request Application master, channel aperture ID write address.
* 1- request OS master, channel aperture ID write
* address.
* 2- request Modem master, channel aperture ID
* write address.
* Other values, error.
* @type: 0- request Application master, channel aperture ID
* write address.
* 1- request OS master, channel aperture ID write
* address.
* 2- request Modem master, channel aperture ID
* write address.
* Other values, error.
* @thread_name: The thread name associated with the master / channel or
* 'NULL' if using the 'current' global variable.
*
* Returns:
* pti_masterchannel struct
* 0 for error
*/
struct pti_masterchannel *pti_request_masterchannel(u8 type)
struct pti_masterchannel *pti_request_masterchannel(u8 type,
const char *thread_name)
{
struct pti_masterchannel *mc;

Expand All @@ -293,15 +311,18 @@ struct pti_masterchannel *pti_request_masterchannel(u8 type)
switch (type) {

case 0:
mc = get_id(drv_data->ia_app, MAX_APP_IDS, APP_BASE_ID);
mc = get_id(drv_data->ia_app, MAX_APP_IDS,
APP_BASE_ID, thread_name);
break;

case 1:
mc = get_id(drv_data->ia_os, MAX_OS_IDS, OS_BASE_ID);
mc = get_id(drv_data->ia_os, MAX_OS_IDS,
OS_BASE_ID, thread_name);
break;

case 2:
mc = get_id(drv_data->ia_modem, MAX_MODEM_IDS, MODEM_BASE_ID);
mc = get_id(drv_data->ia_modem, MAX_MODEM_IDS,
MODEM_BASE_ID, thread_name);
break;
default:
mc = NULL;
Expand Down Expand Up @@ -472,9 +493,9 @@ static int pti_tty_install(struct tty_driver *driver, struct tty_struct *tty)
return -ENOMEM;

if (idx == PTITTY_MINOR_START)
pti_tty_data->mc = pti_request_masterchannel(0);
pti_tty_data->mc = pti_request_masterchannel(0, NULL);
else
pti_tty_data->mc = pti_request_masterchannel(2);
pti_tty_data->mc = pti_request_masterchannel(2, NULL);

if (pti_tty_data->mc == NULL) {
kfree(pti_tty_data);
Expand Down Expand Up @@ -563,7 +584,7 @@ static int pti_char_open(struct inode *inode, struct file *filp)
* before assigning the value to filp->private_data.
* Slightly easier to debug if this driver needs debugging.
*/
mc = pti_request_masterchannel(0);
mc = pti_request_masterchannel(0, NULL);
if (mc == NULL)
return -ENOMEM;
filp->private_data = mc;
Expand Down
54 changes: 0 additions & 54 deletions drivers/parport/parport_pc.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2864,24 +2864,6 @@ enum parport_pc_pci_cards {
lava_parallel_dual_b,
boca_ioppar,
plx_9050,
timedia_4078a,
timedia_4079h,
timedia_4085h,
timedia_4088a,
timedia_4089a,
timedia_4095a,
timedia_4096a,
timedia_4078u,
timedia_4079a,
timedia_4085u,
timedia_4079r,
timedia_4079s,
timedia_4079d,
timedia_4079e,
timedia_4079f,
timedia_9079a,
timedia_9079b,
timedia_9079c,
timedia_4006a,
timedia_4014,
timedia_4008a,
Expand Down Expand Up @@ -2940,24 +2922,6 @@ static struct parport_pc_pci {
/* lava_parallel_dual_b */ { 1, { { 0, -1 }, } },
/* boca_ioppar */ { 1, { { 0, -1 }, } },
/* plx_9050 */ { 2, { { 4, -1 }, { 5, -1 }, } },
/* timedia_4078a */ { 1, { { 2, -1 }, } },
/* timedia_4079h */ { 1, { { 2, 3 }, } },
/* timedia_4085h */ { 2, { { 2, -1 }, { 4, -1 }, } },
/* timedia_4088a */ { 2, { { 2, 3 }, { 4, 5 }, } },
/* timedia_4089a */ { 2, { { 2, 3 }, { 4, 5 }, } },
/* timedia_4095a */ { 2, { { 2, 3 }, { 4, 5 }, } },
/* timedia_4096a */ { 2, { { 2, 3 }, { 4, 5 }, } },
/* timedia_4078u */ { 1, { { 2, -1 }, } },
/* timedia_4079a */ { 1, { { 2, 3 }, } },
/* timedia_4085u */ { 2, { { 2, -1 }, { 4, -1 }, } },
/* timedia_4079r */ { 1, { { 2, 3 }, } },
/* timedia_4079s */ { 1, { { 2, 3 }, } },
/* timedia_4079d */ { 1, { { 2, 3 }, } },
/* timedia_4079e */ { 1, { { 2, 3 }, } },
/* timedia_4079f */ { 1, { { 2, 3 }, } },
/* timedia_9079a */ { 1, { { 2, 3 }, } },
/* timedia_9079b */ { 1, { { 2, 3 }, } },
/* timedia_9079c */ { 1, { { 2, 3 }, } },
/* timedia_4006a */ { 1, { { 0, -1 }, } },
/* timedia_4014 */ { 2, { { 0, -1 }, { 2, -1 }, } },
/* timedia_4008a */ { 1, { { 0, 1 }, } },
Expand Down Expand Up @@ -3019,24 +2983,6 @@ static const struct pci_device_id parport_pc_pci_tbl[] = {
{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
PCI_SUBVENDOR_ID_EXSYS, PCI_SUBDEVICE_ID_EXSYS_4014, 0, 0, plx_9050 },
/* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/
{ 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a },
{ 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h },
{ 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h },
{ 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a },
{ 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a },
{ 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a },
{ 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a },
{ 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u },
{ 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a },
{ 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u },
{ 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r },
{ 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s },
{ 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d },
{ 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e },
{ 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f },
{ 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a },
{ 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b },
{ 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c },
{ 0x1409, 0x7268, 0x1409, 0x0101, 0, 0, timedia_4006a },
{ 0x1409, 0x7268, 0x1409, 0x0102, 0, 0, timedia_4014 },
{ 0x1409, 0x7268, 0x1409, 0x0103, 0, 0, timedia_4008a },
Expand Down
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