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yaml
---
r: 145919
b: refs/heads/master
c: 83cce2b
h: refs/heads/master
i:
  145917: 11a4df9
  145915: 28b0a51
  145911: 4f48ce4
  145903: 8e98581
  145887: 8a20800
  145855: db7b2ef
  145791: 6675e3a
  145663: 729b9a5
  145407: 166de48
v: v3
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Joerg Roedel committed May 28, 2009
1 parent 1c36ae4 commit fb09de9
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Showing 6 changed files with 252 additions and 85 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 47bccd6bb2b866449d3ecf2ba350ac1c7473b2b8
refs/heads/master: 83cce2b69eaa4bc7535f98f75b79397baf277470
8 changes: 8 additions & 0 deletions trunk/arch/x86/Kconfig.debug
Original file line number Diff line number Diff line change
Expand Up @@ -159,6 +159,14 @@ config IOMMU_DEBUG
options. See Documentation/x86_64/boot-options.txt for more
details.

config IOMMU_STRESS
bool "Enable IOMMU stress-test mode"
---help---
This option disables various optimizations in IOMMU related
code to do real stress testing of the IOMMU code. This option
will cause a performance drop and should only be enabled for
testing.

config IOMMU_LEAK
bool "IOMMU leak tracing"
depends on IOMMU_DEBUG && DMA_API_DEBUG
Expand Down
2 changes: 2 additions & 0 deletions trunk/arch/x86/include/asm/amd_iommu.h
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,8 @@ extern int amd_iommu_init(void);
extern int amd_iommu_init_dma_ops(void);
extern void amd_iommu_detect(void);
extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
extern void amd_iommu_flush_all_domains(void);
extern void amd_iommu_flush_all_devices(void);
#else
static inline int amd_iommu_init(void) { return -ENODEV; }
static inline void amd_iommu_detect(void) { }
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14 changes: 14 additions & 0 deletions trunk/arch/x86/include/asm/amd_iommu_types.h
Original file line number Diff line number Diff line change
Expand Up @@ -194,6 +194,20 @@
#define PD_DMA_OPS_MASK (1UL << 0) /* domain used for dma_ops */
#define PD_DEFAULT_MASK (1UL << 1) /* domain is a default dma_ops
domain for an IOMMU */
extern bool amd_iommu_dump;
#define DUMP_printk(format, arg...) \
do { \
if (amd_iommu_dump) \
printk(KERN_INFO "AMD IOMMU: " format, ## arg); \
} while(0);

/*
* Make iterating over all IOMMUs easier
*/
#define for_each_iommu(iommu) \
list_for_each_entry((iommu), &amd_iommu_list, list)
#define for_each_iommu_safe(iommu, next) \
list_for_each_entry_safe((iommu), (next), &amd_iommu_list, list)

#define APERTURE_RANGE_SHIFT 27 /* 128 MB */
#define APERTURE_RANGE_SIZE (1ULL << APERTURE_RANGE_SHIFT)
Expand Down
53 changes: 44 additions & 9 deletions trunk/arch/x86/kernel/amd_iommu.c
Original file line number Diff line number Diff line change
Expand Up @@ -62,6 +62,10 @@ static void dma_ops_reserve_addresses(struct dma_ops_domain *dom,
unsigned long start_page,
unsigned int pages);

#ifndef BUS_NOTIFY_UNBOUND_DRIVER
#define BUS_NOTIFY_UNBOUND_DRIVER 0x0005
#endif

#ifdef CONFIG_AMD_IOMMU_STATS

/*
Expand Down Expand Up @@ -218,7 +222,7 @@ irqreturn_t amd_iommu_int_handler(int irq, void *data)
{
struct amd_iommu *iommu;

list_for_each_entry(iommu, &amd_iommu_list, list)
for_each_iommu(iommu)
iommu_poll_events(iommu);

return IRQ_HANDLED;
Expand Down Expand Up @@ -445,7 +449,7 @@ static void iommu_flush_domain(u16 domid)
__iommu_build_inv_iommu_pages(&cmd, CMD_INV_IOMMU_ALL_PAGES_ADDRESS,
domid, 1, 1);

list_for_each_entry(iommu, &amd_iommu_list, list) {
for_each_iommu(iommu) {
spin_lock_irqsave(&iommu->lock, flags);
__iommu_queue_command(iommu, &cmd);
__iommu_completion_wait(iommu);
Expand All @@ -454,6 +458,35 @@ static void iommu_flush_domain(u16 domid)
}
}

void amd_iommu_flush_all_domains(void)
{
int i;

for (i = 1; i < MAX_DOMAIN_ID; ++i) {
if (!test_bit(i, amd_iommu_pd_alloc_bitmap))
continue;
iommu_flush_domain(i);
}
}

void amd_iommu_flush_all_devices(void)
{
struct amd_iommu *iommu;
int i;

for (i = 0; i <= amd_iommu_last_bdf; ++i) {
if (amd_iommu_pd_table[i] == NULL)
continue;

iommu = amd_iommu_rlookup_table[i];
if (!iommu)
continue;

iommu_queue_inv_dev_entry(iommu, i);
iommu_completion_wait(iommu);
}
}

/****************************************************************************
*
* The functions below are used the create the page table mappings for
Expand Down Expand Up @@ -1119,10 +1152,11 @@ static int device_change_notifier(struct notifier_block *nb,
if (!dma_domain)
dma_domain = iommu->default_dom;
attach_device(iommu, &dma_domain->domain, devid);
printk(KERN_INFO "AMD IOMMU: Using protection domain %d for "
"device %s\n", dma_domain->domain.id, dev_name(dev));
DUMP_printk(KERN_INFO "AMD IOMMU: Using protection domain "
"%d for device %s\n",
dma_domain->domain.id, dev_name(dev));
break;
case BUS_NOTIFY_UNBIND_DRIVER:
case BUS_NOTIFY_UNBOUND_DRIVER:
if (!domain)
goto out;
detach_device(domain, devid);
Expand Down Expand Up @@ -1243,8 +1277,9 @@ static int get_device_resources(struct device *dev,
dma_dom = (*iommu)->default_dom;
*domain = &dma_dom->domain;
attach_device(*iommu, *domain, *bdf);
printk(KERN_INFO "AMD IOMMU: Using protection domain %d for "
"device %s\n", (*domain)->id, dev_name(dev));
DUMP_printk(KERN_INFO "AMD IOMMU: Using protection domain "
"%d for device %s\n",
(*domain)->id, dev_name(dev));
}

if (domain_for_device(_bdf) == NULL)
Expand Down Expand Up @@ -1877,7 +1912,7 @@ int __init amd_iommu_init_dma_ops(void)
* found in the system. Devices not assigned to any other
* protection domain will be assigned to the default one.
*/
list_for_each_entry(iommu, &amd_iommu_list, list) {
for_each_iommu(iommu) {
iommu->default_dom = dma_ops_domain_alloc(iommu);
if (iommu->default_dom == NULL)
return -ENOMEM;
Expand Down Expand Up @@ -1915,7 +1950,7 @@ int __init amd_iommu_init_dma_ops(void)

free_domains:

list_for_each_entry(iommu, &amd_iommu_list, list) {
for_each_iommu(iommu) {
if (iommu->default_dom)
dma_ops_domain_free(iommu->default_dom);
}
Expand Down
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