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ARM: dts: dra7: convert to use new clkctrl layout
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Convert DRA7xx to use the new clockdomain based layout. Previously the
clkctrl split was based on CM isntance boundaries. The new layout
helps with introducing the interconnect driver instances.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tero Kristo authored and Tony Lindgren committed Oct 18, 2018
1 parent 23298c3 commit b5f8ffb
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Showing 8 changed files with 171 additions and 86 deletions.
2 changes: 1 addition & 1 deletion arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -555,7 +555,7 @@

&mcasp3 {
#sound-dai-cells = <0>;
assigned-clocks = <&l4per_clkctrl DRA7_MCASP3_CLKCTRL 24>;
assigned-clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
assigned-clock-parents = <&sys_clkin2>;
status = "okay";

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4 changes: 2 additions & 2 deletions arch/arm/boot/dts/dra7-evm-common.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -214,7 +214,7 @@

&atl {
assigned-clocks = <&abe_dpll_sys_clk_mux>,
<&atl_clkctrl DRA7_ATL_CLKCTRL 26>,
<&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>,
<&dpll_abe_ck>,
<&dpll_abe_m2x2_ck>,
<&atl_clkin2_ck>;
Expand All @@ -232,7 +232,7 @@
&mcasp3 {
#sound-dai-cells = <0>;

assigned-clocks = <&l4per_clkctrl DRA7_MCASP3_CLKCTRL 24>;
assigned-clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
assigned-clock-parents = <&atl_clkin2_ck>;

status = "okay";
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76 changes: 38 additions & 38 deletions arch/arm/boot/dts/dra7.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -899,7 +899,7 @@
ti,hwmods = "timer1";
ti,timer-alwon;
clock-names = "fck";
clocks = <&wkupaon_clkctrl DRA7_TIMER1_CLKCTRL 24>;
clocks = <&wkupaon_clkctrl DRA7_WKUPAON_TIMER1_CLKCTRL 24>;
};

timer2: timer@48032000 {
Expand Down Expand Up @@ -1380,7 +1380,7 @@
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "qspi";
clocks = <&l4per_clkctrl DRA7_QSPI_CLKCTRL 25>;
clocks = <&l4per2_clkctrl DRA7_L4PER2_QSPI_CLKCTRL 25>;
clock-names = "fck";
num-cs = <4>;
interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
Expand All @@ -1403,7 +1403,7 @@
reg-names = "phy_rx", "phy_tx", "pll_ctrl";
syscon-phy-power = <&scm_conf 0x374>;
clocks = <&sys_clkin1>,
<&l3init_clkctrl DRA7_SATA_CLKCTRL 8>;
<&l3init_clkctrl DRA7_L3INIT_SATA_CLKCTRL 8>;
clock-names = "sysclk", "refclk";
syscon-pllreset = <&scm_conf 0x3fc>;
#phy-cells = <0>;
Expand All @@ -1418,9 +1418,9 @@
syscon-pcs = <&scm_conf_pcie 0x10>;
clocks = <&dpll_pcie_ref_ck>,
<&dpll_pcie_ref_m2ldo_ck>,
<&l3init_clkctrl DRA7_PCIE1_CLKCTRL 8>,
<&l3init_clkctrl DRA7_PCIE1_CLKCTRL 9>,
<&l3init_clkctrl DRA7_PCIE1_CLKCTRL 10>,
<&pcie_clkctrl DRA7_PCIE_PCIE1_CLKCTRL 8>,
<&pcie_clkctrl DRA7_PCIE_PCIE1_CLKCTRL 9>,
<&pcie_clkctrl DRA7_PCIE_PCIE1_CLKCTRL 10>,
<&optfclk_pciephy_div>,
<&sys_clkin1>;
clock-names = "dpll_ref", "dpll_ref_m2",
Expand All @@ -1438,9 +1438,9 @@
syscon-pcs = <&scm_conf_pcie 0x10>;
clocks = <&dpll_pcie_ref_ck>,
<&dpll_pcie_ref_m2ldo_ck>,
<&l3init_clkctrl DRA7_PCIE2_CLKCTRL 8>,
<&l3init_clkctrl DRA7_PCIE2_CLKCTRL 9>,
<&l3init_clkctrl DRA7_PCIE2_CLKCTRL 10>,
<&pcie_clkctrl DRA7_PCIE_PCIE2_CLKCTRL 8>,
<&pcie_clkctrl DRA7_PCIE_PCIE2_CLKCTRL 9>,
<&pcie_clkctrl DRA7_PCIE_PCIE2_CLKCTRL 10>,
<&optfclk_pciephy_div>,
<&sys_clkin1>;
clock-names = "dpll_ref", "dpll_ref_m2",
Expand All @@ -1457,7 +1457,7 @@
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
phys = <&sata_phy>;
phy-names = "sata-phy";
clocks = <&l3init_clkctrl DRA7_SATA_CLKCTRL 8>;
clocks = <&l3init_clkctrl DRA7_L3INIT_SATA_CLKCTRL 8>;
ti,hwmods = "sata";
ports-implemented = <0x1>;
};
Expand Down Expand Up @@ -1485,7 +1485,7 @@
reg = <0x4a084000 0x400>;
syscon-phy-power = <&scm_conf 0x300>;
clocks = <&usb_phy1_always_on_clk32k>,
<&l3init_clkctrl DRA7_USB_OTG_SS1_CLKCTRL 8>;
<&l3init_clkctrl DRA7_L3INIT_USB_OTG_SS1_CLKCTRL 8>;
clock-names = "wkupclk",
"refclk";
#phy-cells = <0>;
Expand All @@ -1497,7 +1497,7 @@
reg = <0x4a085000 0x400>;
syscon-phy-power = <&scm_conf 0xe74>;
clocks = <&usb_phy2_always_on_clk32k>,
<&l3init_clkctrl DRA7_USB_OTG_SS2_CLKCTRL 8>;
<&l3init_clkctrl DRA7_L3INIT_USB_OTG_SS2_CLKCTRL 8>;
clock-names = "wkupclk",
"refclk";
#phy-cells = <0>;
Expand All @@ -1512,7 +1512,7 @@
syscon-phy-power = <&scm_conf 0x370>;
clocks = <&usb_phy3_always_on_clk32k>,
<&sys_clkin1>,
<&l3init_clkctrl DRA7_USB_OTG_SS1_CLKCTRL 8>;
<&l3init_clkctrl DRA7_L3INIT_USB_OTG_SS1_CLKCTRL 8>;
clock-names = "wkupclk",
"sysclk",
"refclk";
Expand All @@ -1530,7 +1530,7 @@
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
clocks = <&coreaon_clkctrl DRA7_SMARTREFLEX_CORE_CLKCTRL 0>;
clocks = <&coreaon_clkctrl DRA7_COREAON_SMARTREFLEX_CORE_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
Expand All @@ -1549,7 +1549,7 @@
<SYSC_IDLE_NO>,
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
clocks = <&coreaon_clkctrl DRA7_SMARTREFLEX_MPU_CLKCTRL 0>;
clocks = <&coreaon_clkctrl DRA7_COREAON_SMARTREFLEX_MPU_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
Expand Down Expand Up @@ -1672,7 +1672,7 @@
ti,hwmods = "atl";
ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>,
<&atl_clkin2_ck>, <&atl_clkin3_ck>;
clocks = <&atl_clkctrl DRA7_ATL_CLKCTRL 26>;
clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
clock-names = "fck";
status = "disabled";
};
Expand All @@ -1688,8 +1688,8 @@
interrupt-names = "tx", "rx";
dmas = <&edma_xbar 129 1>, <&edma_xbar 128 1>;
dma-names = "tx", "rx";
clocks = <&ipu_clkctrl DRA7_MCASP1_CLKCTRL 22>, <&ipu_clkctrl DRA7_MCASP1_CLKCTRL 24>,
<&ipu_clkctrl DRA7_MCASP1_CLKCTRL 28>;
clocks = <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 22>, <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 24>,
<&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 28>;
clock-names = "fck", "ahclkx", "ahclkr";
status = "disabled";
};
Expand All @@ -1705,9 +1705,9 @@
interrupt-names = "tx", "rx";
dmas = <&edma_xbar 131 1>, <&edma_xbar 130 1>;
dma-names = "tx", "rx";
clocks = <&l4per_clkctrl DRA7_MCASP2_CLKCTRL 22>,
<&l4per_clkctrl DRA7_MCASP2_CLKCTRL 24>,
<&l4per_clkctrl DRA7_MCASP2_CLKCTRL 28>;
clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP2_CLKCTRL 22>,
<&l4per2_clkctrl DRA7_L4PER2_MCASP2_CLKCTRL 24>,
<&l4per2_clkctrl DRA7_L4PER2_MCASP2_CLKCTRL 28>;
clock-names = "fck", "ahclkx", "ahclkr";
status = "disabled";
};
Expand All @@ -1723,8 +1723,8 @@
interrupt-names = "tx", "rx";
dmas = <&edma_xbar 133 1>, <&edma_xbar 132 1>;
dma-names = "tx", "rx";
clocks = <&l4per_clkctrl DRA7_MCASP3_CLKCTRL 22>,
<&l4per_clkctrl DRA7_MCASP3_CLKCTRL 24>;
clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 22>,
<&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
clock-names = "fck", "ahclkx";
status = "disabled";
};
Expand All @@ -1740,8 +1740,8 @@
interrupt-names = "tx", "rx";
dmas = <&edma_xbar 135 1>, <&edma_xbar 134 1>;
dma-names = "tx", "rx";
clocks = <&l4per_clkctrl DRA7_MCASP4_CLKCTRL 22>,
<&l4per_clkctrl DRA7_MCASP4_CLKCTRL 24>;
clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 22>,
<&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>;
clock-names = "fck", "ahclkx";
status = "disabled";
};
Expand All @@ -1757,8 +1757,8 @@
interrupt-names = "tx", "rx";
dmas = <&edma_xbar 137 1>, <&edma_xbar 136 1>;
dma-names = "tx", "rx";
clocks = <&l4per_clkctrl DRA7_MCASP5_CLKCTRL 22>,
<&l4per_clkctrl DRA7_MCASP5_CLKCTRL 24>;
clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 22>,
<&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>;
clock-names = "fck", "ahclkx";
status = "disabled";
};
Expand All @@ -1774,8 +1774,8 @@
interrupt-names = "tx", "rx";
dmas = <&edma_xbar 139 1>, <&edma_xbar 138 1>;
dma-names = "tx", "rx";
clocks = <&l4per_clkctrl DRA7_MCASP6_CLKCTRL 22>,
<&l4per_clkctrl DRA7_MCASP6_CLKCTRL 24>;
clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 22>,
<&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>;
clock-names = "fck", "ahclkx";
status = "disabled";
};
Expand All @@ -1791,8 +1791,8 @@
interrupt-names = "tx", "rx";
dmas = <&edma_xbar 141 1>, <&edma_xbar 140 1>;
dma-names = "tx", "rx";
clocks = <&l4per_clkctrl DRA7_MCASP7_CLKCTRL 22>,
<&l4per_clkctrl DRA7_MCASP7_CLKCTRL 24>;
clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 22>,
<&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>;
clock-names = "fck", "ahclkx";
status = "disabled";
};
Expand All @@ -1808,8 +1808,8 @@
interrupt-names = "tx", "rx";
dmas = <&edma_xbar 143 1>, <&edma_xbar 142 1>;
dma-names = "tx", "rx";
clocks = <&l4per_clkctrl DRA7_MCASP8_CLKCTRL 22>,
<&l4per_clkctrl DRA7_MCASP8_CLKCTRL 24>;
clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 22>,
<&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 24>;
clock-names = "fck", "ahclkx";
status = "disabled";
};
Expand All @@ -1831,7 +1831,7 @@
mac: ethernet@48484000 {
compatible = "ti,dra7-cpsw","ti,cpsw";
ti,hwmods = "gmac";
clocks = <&gmac_main_clk>, <&l3init_clkctrl DRA7_GMAC_CLKCTRL 25>;
clocks = <&gmac_main_clk>, <&gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 25>;
clock-names = "fck", "cpts";
cpdma_channels = <8>;
ale_entries = <1024>;
Expand Down Expand Up @@ -1901,7 +1901,7 @@
reg = <0x4ae3c000 0x2000>;
syscon-raminit = <&scm_conf 0x558 0>;
interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&wkupaon_clkctrl DRA7_DCAN1_CLKCTRL 24>;
clocks = <&wkupaon_clkctrl DRA7_WKUPAON_DCAN1_CLKCTRL 24>;
status = "disabled";
};

Expand Down Expand Up @@ -1932,7 +1932,7 @@
reg = <0x58001000 0x1000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "dss_dispc";
clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 8>;
clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>;
clock-names = "fck";
/* CTRL_CORE_SMA_SW_1 */
syscon-pol = <&scm_conf 0x534>;
Expand All @@ -1948,8 +1948,8 @@
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
ti,hwmods = "dss_hdmi";
clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 9>,
<&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 10>;
clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 9>,
<&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 10>;
clock-names = "fck", "sys_clk";
dmas = <&sdma_xbar 76>;
dma-names = "audio_tx";
Expand Down
4 changes: 2 additions & 2 deletions arch/arm/boot/dts/dra72-evm-common.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -530,7 +530,7 @@

&atl {
assigned-clocks = <&abe_dpll_sys_clk_mux>,
<&atl_clkctrl DRA7_ATL_CLKCTRL 26>,
<&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>,
<&dpll_abe_ck>,
<&dpll_abe_m2x2_ck>,
<&atl_clkin2_ck>;
Expand All @@ -548,7 +548,7 @@
&mcasp3 {
#sound-dai-cells = <0>;

assigned-clocks = <&l4per_clkctrl DRA7_MCASP3_CLKCTRL 24>;
assigned-clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
assigned-clock-parents = <&atl_clkin2_ck>;

status = "okay";
Expand Down
4 changes: 2 additions & 2 deletions arch/arm/boot/dts/dra72x.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -25,8 +25,8 @@
<0x58004300 0x20>;
reg-names = "dss", "pll1_clkctrl", "pll1";

clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 8>,
<&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 12>;
clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>,
<&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 12>;
clock-names = "fck", "video1_clk";
};

Expand Down
6 changes: 3 additions & 3 deletions arch/arm/boot/dts/dra74x.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -103,9 +103,9 @@
reg-names = "dss", "pll1_clkctrl", "pll1",
"pll2_clkctrl", "pll2";

clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 8>,
<&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 12>,
<&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 13>;
clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>,
<&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 12>,
<&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 13>;
clock-names = "fck", "video1_clk", "video2_clk";
};

Expand Down
2 changes: 1 addition & 1 deletion arch/arm/boot/dts/dra76x.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@
ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET |
SYSC_DRA7_MCAN_ENAWAKEUP)>;
ti,syss-mask = <1>;
clocks = <&wkupaon_clkctrl DRA7_ADC_CLKCTRL 0>;
clocks = <&wkupaon_clkctrl DRA7_WKUPAON_ADC_CLKCTRL 0>;
clock-names = "fck";

m_can0: mcan@1a00 {
Expand Down
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