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drm/amd/display: program k1/k2 divider for virtual signal for DCN32
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[Why&How]
When using IGT, kms_bw multi display tests trigger an assert since
we ignore virtual signal type. k1/k2 dividers should be correctly
programmed if VSYNC needs to be correct. Add the appropriate condition
to the if arm to fix this.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Aurabindo Pillai authored and Alex Deucher committed Aug 25, 2022
1 parent 28c0427 commit e6cf22e
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
Original file line number Diff line number Diff line change
Expand Up @@ -1133,7 +1133,7 @@ unsigned int dcn32_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsign
*k2_div = PIXEL_RATE_DIV_BY_2;
else
*k2_div = PIXEL_RATE_DIV_BY_4;
} else if (dc_is_dp_signal(pipe_ctx->stream->signal)) {
} else if (dc_is_dp_signal(pipe_ctx->stream->signal) || dc_is_virtual_signal(pipe_ctx->stream->signal)) {
if (two_pix_per_container) {
*k1_div = PIXEL_RATE_DIV_BY_1;
*k2_div = PIXEL_RATE_DIV_BY_2;
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