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* Freescale Enhanced Secure Digital Host Controller (eSDHC) | ||
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The Enhanced Secure Digital Host Controller provides an interface | ||
for MMC, SD, and SDIO types of memory cards. | ||
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Required properties: | ||
- compatible : should be | ||
"fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors. | ||
"fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors. | ||
- reg : should contain eSDHC registers location and length. | ||
- interrupts : should contain eSDHC interrupt. | ||
- interrupt-parent : interrupt source phandle. | ||
- clock-frequency : specifies eSDHC base clock frequency. | ||
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Example: | ||
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sdhci@2e000 { | ||
compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc"; | ||
reg = <0x2e000 0x1000>; | ||
interrupts = <42 0x8>; | ||
interrupt-parent = <&ipic>; | ||
/* Filled in by U-Boot */ | ||
clock-frequency = <0>; | ||
}; |
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