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Add support for MIPS O32 FPXX and .MIPS.abiflags
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	* elf/elf.h (PT_MIPS_ABIFLAGS): Define.
	(Elf_MIPS_ABIFlags_v0): New structure.
	(EF_MIPS_FP64): Define.
	(MIPS_AFL_REG_NONE, MIPS_AFL_REG_32, MIPS_AFL_REG_64): Likewise.
	(MIPS_AFL_REG_128, MIPS_AFL_ASE_DSP, MIPS_AFL_ASE_DSP64): Likewise.
	(MIPS_AFL_ASE_DSPR2, MIPS_AFL_ASE_EVA, MIPS_AFL_ASE_MCU): Likewise.
	(MIPS_AFL_ASE_MDMX, MIPS_AFL_ASE_MIPS3D, MIPS_AFL_ASE_MT): Likewise.
	(MIPS_AFL_ASE_SMARTMIPS, MIPS_AFL_ASE_VIRT): Likewise.
	(MIPS_AFL_ASE_VIRT64, MIPS_AFL_ASE_MSA, MIPS_AFL_ASE_MSA64): Likewise.
	(MIPS_AFL_ASE_MIPS16, MIPS_AFL_ASE_MICROMIPS): Likewise.
	(MIPS_AFL_ASE_XPA, MIPS_AFL_EXT_XLR, MIPS_AFL_EXT_OCTEON2): Likewise.
	(MIPS_AFL_EXT_OCTEONP, MIPS_AFL_EXT_LOONGSON_3A): Likewise.
	(MIPS_AFL_EXT_OCTEON, MIPS_AFL_EXT_5900, MIPS_AFL_EXT_4010): Likewise.
	(MIPS_AFL_EXT_4100, MIPS_AFL_EXT_3900, MIPS_AFL_EXT_10000): Likewise.
	(MIPS_AFL_EXT_SB1, MIPS_AFL_EXT_4111, MIPS_AFL_EXT_4120): Likewise.
	(MIPS_AFL_EXT_5400, MIPS_AFL_EXT_5500): Likewise.
	(MIPS_AFL_EXT_LOONGSON_2E, MIPS_AFL_EXT_LOONGSON_2F): Likewise.
	(Val_GNU_MIPS_ABI_FP_ANY, Val_GNU_MIPS_ABI_FP_DOUBLE): New enum values.
	(Val_GNU_MIPS_ABI_FP_SINGLE, Val_GNU_MIPS_ABI_FP_SOFT): Likewise.
	(Val_GNU_MIPS_ABI_FP_OLD_64, Val_GNU_MIPS_ABI_FP_XX): Likewise.
	(Val_GNU_MIPS_ABI_FP_64, Val_GNU_MIPS_ABI_FP_64A): Likewise.
	(Val_GNU_MIPS_ABI_FP_MAX): Likewise.
	* sysdeps/mips/Makefile [subdir=elf]: Add tst-abi-interlink,
	tst-mode-switch-1, tst-mode-switch-2, tst-mode-switch-3 tests.
	* sysdeps/mips/bits/linkmap.h (struct link_map_machine): Add fpmode
	field.
	* sysdeps/mips/dl-machine.h (elf_machine_matches_host): Reject
	EF_MIPS_FP64.
	* sysdeps/mips/dl-machine-reject-phdr.h: New file.
	* sysdeps/mips/tst-abi-fp32mod.c: Likewise.
	* sysdeps/mips/tst-abi-fpxxmod.c: Likewise.
	* sysdeps/mips/tst-abi-fpxxomod.c: Likewise.
	* sysdeps/mips/tst-abi-fp64mod.c: Likewise.
	* sysdeps/mips/tst-abi-fp64amod.c: Likewise.
	* sysdeps/mips/tst-abi-interlink.c: Likewise.
	* sysdeps/mips/tst-mode-switch-1.c: Likewise.
	* sysdeps/mips/tst-mode-switch-2.c: Likewise.
	* sysdeps/mips/tst-mode-switch-3.c: Likewise.
	* sysdeps/unix/sysv/linux/mips/configure.ac (o32-fpabi): Define to
	record the current FP ABI extension.
	(mips-mode-switch): Define to show if kernel headers support mode
	switching.
	* sysdeps/unix/sysv/linux/mips/configure: Regenerate.
	* sysdeps/unix/sysv/linux/mips/ldsodefs.h: Increase maximum
	supported SYSV ABI version to 3.
	* sysdeps/unix/sysv/linux/mips/libc-abis: Add new MIPS_O32_FP64
	feature.
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Matthew Fortune committed Dec 31, 2014
1 parent f59ad97 commit 0bd9567
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50 changes: 50 additions & 0 deletions ChangeLog
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Original file line number Diff line number Diff line change
@@ -1,3 +1,53 @@
2014-12-31 Matthew Fortune <matthew.fortune@imgtec.com>

* elf/elf.h (PT_MIPS_ABIFLAGS): Define.
(Elf_MIPS_ABIFlags_v0): New structure.
(EF_MIPS_FP64): Define.
(MIPS_AFL_REG_NONE, MIPS_AFL_REG_32, MIPS_AFL_REG_64): Likewise.
(MIPS_AFL_REG_128, MIPS_AFL_ASE_DSP, MIPS_AFL_ASE_DSP64): Likewise.
(MIPS_AFL_ASE_DSPR2, MIPS_AFL_ASE_EVA, MIPS_AFL_ASE_MCU): Likewise.
(MIPS_AFL_ASE_MDMX, MIPS_AFL_ASE_MIPS3D, MIPS_AFL_ASE_MT): Likewise.
(MIPS_AFL_ASE_SMARTMIPS, MIPS_AFL_ASE_VIRT): Likewise.
(MIPS_AFL_ASE_VIRT64, MIPS_AFL_ASE_MSA, MIPS_AFL_ASE_MSA64): Likewise.
(MIPS_AFL_ASE_MIPS16, MIPS_AFL_ASE_MICROMIPS): Likewise.
(MIPS_AFL_ASE_XPA, MIPS_AFL_EXT_XLR, MIPS_AFL_EXT_OCTEON2): Likewise.
(MIPS_AFL_EXT_OCTEONP, MIPS_AFL_EXT_LOONGSON_3A): Likewise.
(MIPS_AFL_EXT_OCTEON, MIPS_AFL_EXT_5900, MIPS_AFL_EXT_4010): Likewise.
(MIPS_AFL_EXT_4100, MIPS_AFL_EXT_3900, MIPS_AFL_EXT_10000): Likewise.
(MIPS_AFL_EXT_SB1, MIPS_AFL_EXT_4111, MIPS_AFL_EXT_4120): Likewise.
(MIPS_AFL_EXT_5400, MIPS_AFL_EXT_5500): Likewise.
(MIPS_AFL_EXT_LOONGSON_2E, MIPS_AFL_EXT_LOONGSON_2F): Likewise.
(Val_GNU_MIPS_ABI_FP_ANY, Val_GNU_MIPS_ABI_FP_DOUBLE): New enum values.
(Val_GNU_MIPS_ABI_FP_SINGLE, Val_GNU_MIPS_ABI_FP_SOFT): Likewise.
(Val_GNU_MIPS_ABI_FP_OLD_64, Val_GNU_MIPS_ABI_FP_XX): Likewise.
(Val_GNU_MIPS_ABI_FP_64, Val_GNU_MIPS_ABI_FP_64A): Likewise.
(Val_GNU_MIPS_ABI_FP_MAX): Likewise.
* sysdeps/mips/Makefile [subdir=elf]: Add tst-abi-interlink,
tst-mode-switch-1, tst-mode-switch-2, tst-mode-switch-3 tests.
* sysdeps/mips/bits/linkmap.h (struct link_map_machine): Add fpmode
field.
* sysdeps/mips/dl-machine.h (elf_machine_matches_host): Reject
EF_MIPS_FP64.
* sysdeps/mips/dl-machine-reject-phdr.h: New file.
* sysdeps/mips/tst-abi-fp32mod.c: Likewise.
* sysdeps/mips/tst-abi-fpxxmod.c: Likewise.
* sysdeps/mips/tst-abi-fpxxomod.c: Likewise.
* sysdeps/mips/tst-abi-fp64mod.c: Likewise.
* sysdeps/mips/tst-abi-fp64amod.c: Likewise.
* sysdeps/mips/tst-abi-interlink.c: Likewise.
* sysdeps/mips/tst-mode-switch-1.c: Likewise.
* sysdeps/mips/tst-mode-switch-2.c: Likewise.
* sysdeps/mips/tst-mode-switch-3.c: Likewise.
* sysdeps/unix/sysv/linux/mips/configure.ac (o32-fpabi): Define to
record the current FP ABI extension.
(mips-mode-switch): Define to show if kernel headers support mode
switching.
* sysdeps/unix/sysv/linux/mips/configure: Regenerate.
* sysdeps/unix/sysv/linux/mips/ldsodefs.h: Increase maximum
supported SYSV ABI version to 3.
* sysdeps/unix/sysv/linux/mips/libc-abis: Add new MIPS_O32_FP64
feature.

2014-12-31 Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
Adhemerval Zanella <azanella@linux.vnet.ibm.com>

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103 changes: 100 additions & 3 deletions elf/elf.h
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Expand Up @@ -1383,6 +1383,7 @@ typedef struct
#define EF_MIPS_64BIT_WHIRL 16
#define EF_MIPS_ABI2 32
#define EF_MIPS_ABI_ON32 64
#define EF_MIPS_FP64 512 /* Uses FP64 (12 callee-saved). */
#define EF_MIPS_NAN2008 1024 /* Uses IEEE 754-2008 NaN encoding. */
#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level. */

Expand Down Expand Up @@ -1631,9 +1632,10 @@ typedef struct

/* Legal values for p_type field of Elf32_Phdr. */

#define PT_MIPS_REGINFO 0x70000000 /* Register usage information */
#define PT_MIPS_RTPROC 0x70000001 /* Runtime procedure table. */
#define PT_MIPS_OPTIONS 0x70000002
#define PT_MIPS_REGINFO 0x70000000 /* Register usage information. */
#define PT_MIPS_RTPROC 0x70000001 /* Runtime procedure table. */
#define PT_MIPS_OPTIONS 0x70000002
#define PT_MIPS_ABIFLAGS 0x70000003 /* FP mode requirement. */

/* Special program header types. */

Expand Down Expand Up @@ -1755,6 +1757,101 @@ typedef struct

typedef Elf32_Addr Elf32_Conflict;

typedef struct
{
/* Version of flags structure. */
Elf32_Half version;
/* The level of the ISA: 1-5, 32, 64. */
unsigned char isa_level;
/* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */
unsigned char isa_rev;
/* The size of general purpose registers. */
unsigned char gpr_size;
/* The size of co-processor 1 registers. */
unsigned char cpr1_size;
/* The size of co-processor 2 registers. */
unsigned char cpr2_size;
/* The floating-point ABI. */
unsigned char fp_abi;
/* Processor-specific extension. */
Elf32_Word isa_ext;
/* Mask of ASEs used. */
Elf32_Word ases;
/* Mask of general flags. */
Elf32_Word flags1;
Elf32_Word flags2;
} Elf_MIPS_ABIFlags_v0;

/* Values for the register size bytes of an abi flags structure. */

#define MIPS_AFL_REG_NONE 0x00 /* No registers. */
#define MIPS_AFL_REG_32 0x01 /* 32-bit registers. */
#define MIPS_AFL_REG_64 0x02 /* 64-bit registers. */
#define MIPS_AFL_REG_128 0x03 /* 128-bit registers. */

/* Masks for the ases word of an ABI flags structure. */

#define MIPS_AFL_ASE_DSP 0x00000001 /* DSP ASE. */
#define MIPS_AFL_ASE_DSPR2 0x00000002 /* DSP R2 ASE. */
#define MIPS_AFL_ASE_EVA 0x00000004 /* Enhanced VA Scheme. */
#define MIPS_AFL_ASE_MCU 0x00000008 /* MCU (MicroController) ASE. */
#define MIPS_AFL_ASE_MDMX 0x00000010 /* MDMX ASE. */
#define MIPS_AFL_ASE_MIPS3D 0x00000020 /* MIPS-3D ASE. */
#define MIPS_AFL_ASE_MT 0x00000040 /* MT ASE. */
#define MIPS_AFL_ASE_SMARTMIPS 0x00000080 /* SmartMIPS ASE. */
#define MIPS_AFL_ASE_VIRT 0x00000100 /* VZ ASE. */
#define MIPS_AFL_ASE_MSA 0x00000200 /* MSA ASE. */
#define MIPS_AFL_ASE_MIPS16 0x00000400 /* MIPS16 ASE. */
#define MIPS_AFL_ASE_MICROMIPS 0x00000800 /* MICROMIPS ASE. */
#define MIPS_AFL_ASE_XPA 0x00001000 /* XPA ASE. */
#define MIPS_AFL_ASE_MASK 0x00001fff /* All ASEs. */

/* Values for the isa_ext word of an ABI flags structure. */

#define MIPS_AFL_EXT_XLR 1 /* RMI Xlr instruction. */
#define MIPS_AFL_EXT_OCTEON2 2 /* Cavium Networks Octeon2. */
#define MIPS_AFL_EXT_OCTEONP 3 /* Cavium Networks OcteonP. */
#define MIPS_AFL_EXT_LOONGSON_3A 4 /* Loongson 3A. */
#define MIPS_AFL_EXT_OCTEON 5 /* Cavium Networks Octeon. */
#define MIPS_AFL_EXT_5900 6 /* MIPS R5900 instruction. */
#define MIPS_AFL_EXT_4650 7 /* MIPS R4650 instruction. */
#define MIPS_AFL_EXT_4010 8 /* LSI R4010 instruction. */
#define MIPS_AFL_EXT_4100 9 /* NEC VR4100 instruction. */
#define MIPS_AFL_EXT_3900 10 /* Toshiba R3900 instruction. */
#define MIPS_AFL_EXT_10000 11 /* MIPS R10000 instruction. */
#define MIPS_AFL_EXT_SB1 12 /* Broadcom SB-1 instruction. */
#define MIPS_AFL_EXT_4111 13 /* NEC VR4111/VR4181 instruction. */
#define MIPS_AFL_EXT_4120 14 /* NEC VR4120 instruction. */
#define MIPS_AFL_EXT_5400 15 /* NEC VR5400 instruction. */
#define MIPS_AFL_EXT_5500 16 /* NEC VR5500 instruction. */
#define MIPS_AFL_EXT_LOONGSON_2E 17 /* ST Microelectronics Loongson 2E. */
#define MIPS_AFL_EXT_LOONGSON_2F 18 /* ST Microelectronics Loongson 2F. */

/* Masks for the flags1 word of an ABI flags structure. */
#define MIPS_AFL_FLAGS1_ODDSPREG 1 /* Uses odd single-precision registers. */

/* Object attribute values. */
enum
{
/* Not tagged or not using any ABIs affected by the differences. */
Val_GNU_MIPS_ABI_FP_ANY = 0,
/* Using hard-float -mdouble-float. */
Val_GNU_MIPS_ABI_FP_DOUBLE = 1,
/* Using hard-float -msingle-float. */
Val_GNU_MIPS_ABI_FP_SINGLE = 2,
/* Using soft-float. */
Val_GNU_MIPS_ABI_FP_SOFT = 3,
/* Using -mips32r2 -mfp64. */
Val_GNU_MIPS_ABI_FP_OLD_64 = 4,
/* Using -mfpxx. */
Val_GNU_MIPS_ABI_FP_XX = 5,
/* Using -mips32r2 -mfp64. */
Val_GNU_MIPS_ABI_FP_64 = 6,
/* Using -mips32r2 -mfp64 -mno-odd-spreg. */
Val_GNU_MIPS_ABI_FP_64A = 7,
/* Maximum allocated FP ABI value. */
Val_GNU_MIPS_ABI_FP_MAX = 7
};

/* HPPA specific definitions. */

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50 changes: 50 additions & 0 deletions sysdeps/mips/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -26,3 +26,53 @@ CPPFLAGS-crtn.S += $(pic-ccflag)
endif

ASFLAGS-.os += $(pic-ccflag)

ifeq ($(subdir),elf)
ifneq ($(o32-fpabi),)
tests += tst-abi-interlink

fpabi-modules-names =
fpabi_list =
ifneq (,$(filter $(o32-fpabi),32 xx xxo))
fpabi-modules-names += tst-abi-fp32mod
CFLAGS-tst-abi-fp32mod.c += -mfp32
endif
ifneq (,$(filter $(o32-fpabi),xx))
fpabi-modules-names += tst-abi-fpxxmod
CFLAGS-tst-abi-fpxxmod.c += -mfpxx -mno-odd-spreg
endif
ifneq (,$(filter $(o32-fpabi),xx xxo))
fpabi-modules-names += tst-abi-fpxxomod
CFLAGS-tst-abi-fpxxomod.c += -mfpxx -modd-spreg
endif
ifneq (,$(filter $(o32-fpabi),xx 64a))
fpabi-modules-names += tst-abi-fp64amod
CFLAGS-tst-abi-fp64amod.c += -mfp64 -mno-odd-spreg
endif
ifneq (,$(filter $(o32-fpabi),xx xxo 64a 64))
fpabi-modules-names += tst-abi-fp64mod
CFLAGS-tst-abi-fp64mod.c += -mfp64 -modd-spreg
endif
modules-names += $(fpabi-modules-names)

comma:=,
empty:=
space:=$(empty) $(empty)
fpabi_list=$(subst $(space),$(comma),$(patsubst tst-abi-%mod,o_%,\
$(fpabi-modules-names)))
CPPFLAGS-tst-abi-interlink.c += -DFPABI_LIST=$(fpabi_list)
CPPFLAGS-tst-abi-interlink.c += -DFPABI_COUNT=$(words $(fpabi-modules-names))
CPPFLAGS-tst-abi-interlink.c += -DFPABI_NATIVE=o_fp$(o32-fpabi)
$(objpfx)tst-abi-interlink: $(libdl)
$(objpfx)tst-abi-interlink.out: $(patsubst %,$(objpfx)%.so,\
$(fpabi-modules-names))
endif

ifeq ($(mips-mode-switch),yes)
ifeq ($(o32-fpabi),xx)
tests += tst-mode-switch-1 tst-mode-switch-2 tst-mode-switch-3
$(objpfx)tst-mode-switch-1: $(shared-thread-library)
$(objpfx)tst-mode-switch-2: $(shared-thread-library)
endif
endif
endif
2 changes: 2 additions & 0 deletions sysdeps/mips/bits/linkmap.h
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Original file line number Diff line number Diff line change
@@ -1,4 +1,6 @@
struct link_map_machine
{
ElfW(Addr) plt; /* Address of .plt */
ElfW(Word) fpabi; /* FP ABI of the object */
unsigned int odd_spreg; /* Does the object require odd_spreg support? */
};
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