Enable static 32-bit SSE4.2 strcasecmp/strncasecmp

git-mirror · Jul 2, 2013 · 1c81621 · 1c81621
1 parent 77f01ab
commit 1c81621
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diff --git a/ChangeLog b/ChangeLog
@@ -1,3 +1,9 @@
+2013-07-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* sysdeps/i386/i686/multiarch/strcasecmp.S (__strcasecmp): Enable
+	SSE4.2 strcasecmp for libc.a.
+	* sysdeps/i386/i686/multiarch/strncase.S (__strncasecmp): Likewise.
+
 2013-07-02  Joseph Myers  <joseph@codesourcery.com>
 
 	[BZ #13304]

diff --git a/sysdeps/i386/i686/multiarch/strcasecmp.S b/sysdeps/i386/i686/multiarch/strcasecmp.S
@@ -54,12 +54,9 @@ ENTRY(__strcasecmp)
 	testl	$bit_SSSE3, CPUID_OFFSET+index_SSSE3+__cpu_features
 	jz	2f
 	leal	__strcasecmp_ssse3, %eax
-#if 0
-	// XXX Temporarily
 	testl	$bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features
 	jz	2f
 	leal	__strcasecmp_sse4_2, %eax
-#endif
 2:	ret
 END(__strcasecmp)
 #endif

diff --git a/sysdeps/i386/i686/multiarch/strncase.S b/sysdeps/i386/i686/multiarch/strncase.S
@@ -54,12 +54,9 @@ ENTRY(__strncasecmp)
 	testl	$bit_SSSE3, CPUID_OFFSET+index_SSSE3+__cpu_features
 	jz	2f
 	leal	__strncasecmp_ssse3, %eax
-#if 0
-	// XXX Temporarily
 	testl	$bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features
 	jz	2f
 	leal	__strncasecmp_sse4_2, %eax
-#endif
 2:	ret
 END(__strncasecmp)
 #endif