Make armv6t2 strlen work in ARM mode too.

git-mirror · Aug 30, 2013 · 21bfcec · 21bfcec
1 parent f24a6d0
commit 21bfcec
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diff --git a/ports/ChangeLog.arm b/ports/ChangeLog.arm
@@ -1,3 +1,8 @@
+2013-08-30  Roland McGrath  <roland@hack.frob.com>
+
+	* sysdeps/arm/armv6t2/strlen.S: Include <arm-features.h> first thing.
+	[NO_THUMB]: Adapt code for ARM mode.
+
 2013-08-30  Will Newton  <will.newton@linaro.org>
 
 	[BZ #15909]

diff --git a/ports/sysdeps/arm/armv6t2/strlen.S b/ports/sysdeps/arm/armv6t2/strlen.S
@@ -21,6 +21,7 @@
 
  */
 
+#include <arm-features.h>               /* This might #define NO_THUMB.  */
 #include <sysdep.h>
 
 #ifdef __ARMEB__
@@ -31,9 +32,24 @@
 #define S2HI		lsl
 #endif
 
-	/* This code requires Thumb.  */
+#ifndef NO_THUMB
+/* This code is best on Thumb.  */
 	.thumb
-	.syntax unified
+#else
+/* Using bne.w explicitly is desirable in Thumb mode because it helps
+   align the following label without a nop.  In ARM mode there is no
+   such difference.  */
+.macro bne.w label
+	bne \label
+.endm
+
+/* This clobbers the condition codes, which the real Thumb cbnz instruction
+   does not do.  But it doesn't matter for any of the uses here.  */
+.macro cbnz reg, label
+	cmp \reg, #0
+	bne \label
+.endm
+#endif
 
 /* Parameters and result.  */
 #define srcin		r0
@@ -130,9 +146,16 @@ ENTRY(strlen)
 	tst	tmp1, #4
 	pld	[src, #64]
 	S2HI	tmp2, const_m1, tmp2
+#ifdef NO_THUMB
+	mvn	tmp1, tmp2
+	orr	data1a, data1a, tmp1
+	itt	ne
+	orrne	data1b, data1b, tmp1
+#else
 	orn	data1a, data1a, tmp2
 	itt	ne
 	ornne	data1b, data1b, tmp2
+#endif
 	movne	data1a, const_m1
 	mov	const_0, #0
 	b	.Lstart_realigned