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Vector log for x86_64 and tests.
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Here is implementation of vectorized log containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * bits/libm-simd-decl-stubs.h: Added stubs for log.
    * math/bits/mathcalls.h: Added log declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for log.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector log test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector log.
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Andrew Senkevich committed Jun 17, 2015
1 parent c71c89e commit 6af25ac
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34 changes: 34 additions & 0 deletions ChangeLog
Original file line number Diff line number Diff line change
@@ -1,3 +1,37 @@
2015-06-17 Andrew Senkevich <andrew.senkevich@intel.com>

* bits/libm-simd-decl-stubs.h: Added stubs for log.
* math/bits/mathcalls.h: Added log declaration with __MATHCALL_VEC.
* sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
* sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
redirections for log.
* sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
* sysdeps/x86_64/fpu/Versions: New versions added.
* sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
build of SSE, AVX2 and AVX512 IFUNC versions.
* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core_sse4.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core_avx2.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S: New file.
* sysdeps/x86_64/fpu/svml_d_log2_core.S: New file.
* sysdeps/x86_64/fpu/svml_d_log4_core.S: New file.
* sysdeps/x86_64/fpu/svml_d_log4_core_avx.S: New file.
* sysdeps/x86_64/fpu/svml_d_log8_core.S: New file.
* sysdeps/x86_64/fpu/svml_d_log_data.S: New file.
* sysdeps/x86_64/fpu/svml_d_log_data.h: New file.
* sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector log test.
* sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
* NEWS: Mention addition of x86_64 vector log.

2015-06-17 Szabolcs Nagy <szabolcs.nagy@arm.com>

* sysdeps/aarch64/dl-tlsdesc.S (_dl_tlsdesc_return_lazy): Fix
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2 changes: 1 addition & 1 deletion NEWS
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Expand Up @@ -53,7 +53,7 @@ Version 2.22
condition in some applications.

* Added vector math library named libmvec with the following vectorized x86_64
implementations: cos, cosf, sin, sinf.
implementations: cos, cosf, sin, sinf, log.
The library can be disabled with --disable-mathvec. Use of the functions is
enabled with -fopenmp -ffast-math starting from -O1 for GCC version >= 4.9.0.
The library is linked in as needed when using -lm (no need to specify -lmvec
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4 changes: 4 additions & 0 deletions bits/libm-simd-decl-stubs.h
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Expand Up @@ -41,4 +41,8 @@
#define __DECL_SIMD_sinf
#define __DECL_SIMD_sinl

#define __DECL_SIMD_log
#define __DECL_SIMD_logf
#define __DECL_SIMD_logl

#endif
2 changes: 1 addition & 1 deletion math/bits/mathcalls.h
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Expand Up @@ -106,7 +106,7 @@ __MATHCALL (frexp,, (_Mdouble_ __x, int *__exponent));
__MATHCALL (ldexp,, (_Mdouble_ __x, int __exponent));

/* Natural logarithm of X. */
__MATHCALL (log,, (_Mdouble_ __x));
__MATHCALL_VEC (log,, (_Mdouble_ __x));

/* Base-ten logarithm of X. */
__MATHCALL (log10,, (_Mdouble_ __x));
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4 changes: 4 additions & 0 deletions sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
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@@ -1,18 +1,22 @@
GLIBC_2.22
GLIBC_2.22 A
_ZGVbN2v_cos F
_ZGVbN2v_log F
_ZGVbN2v_sin F
_ZGVbN4v_cosf F
_ZGVbN4v_sinf F
_ZGVcN4v_cos F
_ZGVcN4v_log F
_ZGVcN4v_sin F
_ZGVcN8v_cosf F
_ZGVcN8v_sinf F
_ZGVdN4v_cos F
_ZGVdN4v_log F
_ZGVdN4v_sin F
_ZGVdN8v_cosf F
_ZGVdN8v_sinf F
_ZGVeN16v_cosf F
_ZGVeN16v_sinf F
_ZGVeN8v_cos F
_ZGVeN8v_log F
_ZGVeN8v_sin F
12 changes: 12 additions & 0 deletions sysdeps/x86/fpu/bits/math-vector.h
Original file line number Diff line number Diff line change
Expand Up @@ -36,5 +36,17 @@
# define __DECL_SIMD_sin __DECL_SIMD_x86_64
# undef __DECL_SIMD_sinf
# define __DECL_SIMD_sinf __DECL_SIMD_x86_64
# undef __DECL_SIMD_log
# define __DECL_SIMD_log __DECL_SIMD_x86_64

/* Workaround to exclude unnecessary symbol aliases in libmvec
while GCC creates the vector names based on scalar asm name.
Corresponding discussion started at
<https://gcc.gnu.org/ml/gcc/2015-06/msg00173.html>. */
__asm__ ("_ZGVbN2v___log_finite = _ZGVbN2v_log");
__asm__ ("_ZGVcN4v___log_finite = _ZGVcN4v_log");
__asm__ ("_ZGVdN4v___log_finite = _ZGVdN4v_log");
__asm__ ("_ZGVeN8v___log_finite = _ZGVeN8v_log");

# endif
#endif
2 changes: 2 additions & 0 deletions sysdeps/x86_64/fpu/Makefile
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Expand Up @@ -7,6 +7,8 @@ libmvec-support += svml_d_cos2_core svml_d_cos4_core_avx \
svml_s_cosf8_core svml_s_cosf16_core svml_s_cosf_data \
svml_s_sinf4_core svml_s_sinf8_core_avx \
svml_s_sinf8_core svml_s_sinf16_core svml_s_sinf_data \
svml_d_log2_core svml_d_log4_core_avx svml_d_log4_core \
svml_d_log8_core svml_d_log_data \
init-arch
endif

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1 change: 1 addition & 0 deletions sysdeps/x86_64/fpu/Versions
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Expand Up @@ -2,6 +2,7 @@ libmvec {
GLIBC_2.22 {
_ZGVbN2v_cos; _ZGVcN4v_cos; _ZGVdN4v_cos; _ZGVeN8v_cos;
_ZGVbN2v_sin; _ZGVcN4v_sin; _ZGVdN4v_sin; _ZGVeN8v_sin;
_ZGVbN2v_log; _ZGVcN4v_log; _ZGVdN4v_log; _ZGVeN8v_log;
_ZGVbN4v_cosf; _ZGVcN8v_cosf; _ZGVdN8v_cosf; _ZGVeN16v_cosf;
_ZGVbN4v_sinf; _ZGVcN8v_sinf; _ZGVdN8v_sinf; _ZGVeN16v_sinf;
}
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12 changes: 12 additions & 0 deletions sysdeps/x86_64/fpu/libm-test-ulps
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Expand Up @@ -1847,6 +1847,18 @@ ifloat: 2
ildouble: 1
ldouble: 1

Function: "log_vlen2":
double: 1

Function: "log_vlen4":
double: 1

Function: "log_vlen4_avx2":
double: 1

Function: "log_vlen8":
double: 1

Function: "pow":
float: 3
ifloat: 3
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2 changes: 2 additions & 0 deletions sysdeps/x86_64/fpu/multiarch/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -56,6 +56,8 @@ ifeq ($(subdir),mathvec)
libmvec-sysdep_routines += svml_d_cos2_core_sse4 svml_d_cos4_core_avx2 \
svml_d_cos8_core_avx512 svml_d_sin2_core_sse4 \
svml_d_sin4_core_avx2 svml_d_sin8_core_avx512 \
svml_d_log2_core_sse4 svml_d_log4_core_avx2 \
svml_d_log8_core_avx512 \
svml_s_cosf4_core_sse4 svml_s_cosf8_core_avx2 \
svml_s_cosf16_core_avx512 svml_s_sinf4_core_sse4 \
svml_s_sinf8_core_avx2 svml_s_sinf16_core_avx512
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38 changes: 38 additions & 0 deletions sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S
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@@ -0,0 +1,38 @@
/* Multiple versions of vectorized log.
Copyright (C) 2014-2015 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */

#include <sysdep.h>
#include <init-arch.h>

.text
ENTRY (_ZGVbN2v_log)
.type _ZGVbN2v_log, @gnu_indirect_function
cmpl $0, KIND_OFFSET+__cpu_features(%rip)
jne 1f
call __init_cpu_features
1: leaq _ZGVbN2v_log_sse4(%rip), %rax
testl $bit_SSE4_1, __cpu_features+CPUID_OFFSET+index_SSE4_1(%rip)
jz 2f
ret
2: leaq _ZGVbN2v_log_sse2(%rip), %rax
ret
END (_ZGVbN2v_log)
libmvec_hidden_def (_ZGVbN2v_log)

#define _ZGVbN2v_log _ZGVbN2v_log_sse2
#include "../svml_d_log2_core.S"
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