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Merge branch 'octeontx2-multicast-mirror-offload'
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Suman Ghosh says:

====================
octeontx2: Multicast/mirror offload changes

This patchset includes changes to support TC multicast/mirror offload.

Patch #1: Adds changes to support new mailbox to offload multicast/mirror
offload.

Patch #2: Adds TC related changes which uses the newly added mailboxes to
offload multicast/mirror rules.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller committed Dec 4, 2023
2 parents 8470e43 + df094d8 commit 21f4968
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Showing 7 changed files with 978 additions and 41 deletions.
72 changes: 72 additions & 0 deletions drivers/net/ethernet/marvell/octeontx2/af/mbox.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -304,6 +304,13 @@ M(NIX_BANDPROF_GET_HWINFO, 0x801f, nix_bandprof_get_hwinfo, msg_req, \
nix_bandprof_get_hwinfo_rsp) \
M(NIX_READ_INLINE_IPSEC_CFG, 0x8023, nix_read_inline_ipsec_cfg, \
msg_req, nix_inline_ipsec_cfg) \
M(NIX_MCAST_GRP_CREATE, 0x802b, nix_mcast_grp_create, nix_mcast_grp_create_req, \
nix_mcast_grp_create_rsp) \
M(NIX_MCAST_GRP_DESTROY, 0x802c, nix_mcast_grp_destroy, nix_mcast_grp_destroy_req, \
msg_rsp) \
M(NIX_MCAST_GRP_UPDATE, 0x802d, nix_mcast_grp_update, \
nix_mcast_grp_update_req, \
nix_mcast_grp_update_rsp) \
/* MCS mbox IDs (range 0xA000 - 0xBFFF) */ \
M(MCS_ALLOC_RESOURCES, 0xa000, mcs_alloc_resources, mcs_alloc_rsrc_req, \
mcs_alloc_rsrc_rsp) \
Expand Down Expand Up @@ -830,6 +837,9 @@ enum nix_af_status {
NIX_AF_ERR_CQ_CTX_WRITE_ERR = -429,
NIX_AF_ERR_AQ_CTX_RETRY_WRITE = -430,
NIX_AF_ERR_LINK_CREDITS = -431,
NIX_AF_ERR_INVALID_MCAST_GRP = -436,
NIX_AF_ERR_INVALID_MCAST_DEL_REQ = -437,
NIX_AF_ERR_NON_CONTIG_MCE_LIST = -438,
};

/* For NIX RX vtag action */
Expand Down Expand Up @@ -1204,6 +1214,68 @@ struct nix_bp_cfg_rsp {
u8 chan_cnt; /* Number of channel for which bpids are assigned */
};

struct nix_mcast_grp_create_req {
struct mbox_msghdr hdr;
#define NIX_MCAST_INGRESS 0
#define NIX_MCAST_EGRESS 1
u8 dir;
u8 reserved[11];
/* Reserving few bytes for future requirement */
};

struct nix_mcast_grp_create_rsp {
struct mbox_msghdr hdr;
/* This mcast_grp_idx should be passed during MCAM
* write entry for multicast. AF will identify the
* corresponding multicast table index associated
* with the group id and program the same to MCAM entry.
* This group id is also needed during group delete
* and update request.
*/
u32 mcast_grp_idx;
};

struct nix_mcast_grp_destroy_req {
struct mbox_msghdr hdr;
/* Group id returned by nix_mcast_grp_create_rsp */
u32 mcast_grp_idx;
/* If AF is requesting for destroy, then set
* it to '1'. Otherwise keep it to '0'
*/
u8 is_af;
};

struct nix_mcast_grp_update_req {
struct mbox_msghdr hdr;
/* Group id returned by nix_mcast_grp_create_rsp */
u32 mcast_grp_idx;
/* Number of multicast/mirror entries requested */
u32 num_mce_entry;
#define NIX_MCE_ENTRY_MAX 64
#define NIX_RX_RQ 0
#define NIX_RX_RSS 1
/* Receive queue or RSS index within pf_func */
u32 rq_rss_index[NIX_MCE_ENTRY_MAX];
/* pcifunc is required for both ingress and egress multicast */
u16 pcifunc[NIX_MCE_ENTRY_MAX];
/* channel is required for egress multicast */
u16 channel[NIX_MCE_ENTRY_MAX];
#define NIX_MCAST_OP_ADD_ENTRY 0
#define NIX_MCAST_OP_DEL_ENTRY 1
/* Destination type. 0:Receive queue, 1:RSS*/
u8 dest_type[NIX_MCE_ENTRY_MAX];
u8 op;
/* If AF is requesting for update, then set
* it to '1'. Otherwise keep it to '0'
*/
u8 is_af;
};

struct nix_mcast_grp_update_rsp {
struct mbox_msghdr hdr;
u32 mce_start_index;
};

/* Global NIX inline IPSec configuration */
struct nix_inline_ipsec_cfg {
struct mbox_msghdr hdr;
Expand Down
6 changes: 5 additions & 1 deletion drivers/net/ethernet/marvell/octeontx2/af/rvu.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -156,7 +156,7 @@ int rvu_alloc_rsrc_contig(struct rsrc_bmap *rsrc, int nrsrc)
return start;
}

static void rvu_free_rsrc_contig(struct rsrc_bmap *rsrc, int nrsrc, int start)
void rvu_free_rsrc_contig(struct rsrc_bmap *rsrc, int nrsrc, int start)
{
if (!rsrc->bmap)
return;
Expand Down Expand Up @@ -2614,6 +2614,10 @@ static void __rvu_flr_handler(struct rvu *rvu, u16 pcifunc)
* 2. Flush and reset SSO/SSOW
* 3. Cleanup pools (NPA)
*/

/* Free multicast/mirror node associated with the 'pcifunc' */
rvu_nix_mcast_flr_free_entries(rvu, pcifunc);

rvu_blklf_teardown(rvu, pcifunc, BLKADDR_NIX0);
rvu_blklf_teardown(rvu, pcifunc, BLKADDR_NIX1);
rvu_blklf_teardown(rvu, pcifunc, BLKADDR_CPT0);
Expand Down
39 changes: 34 additions & 5 deletions drivers/net/ethernet/marvell/octeontx2/af/rvu.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -116,11 +116,12 @@ struct rvu_block {
};

struct nix_mcast {
struct qmem *mce_ctx;
struct qmem *mcast_buf;
int replay_pkind;
int next_free_mce;
struct mutex mce_lock; /* Serialize MCE updates */
struct qmem *mce_ctx;
struct qmem *mcast_buf;
int replay_pkind;
struct rsrc_bmap mce_counter[2];
/* Counters for both ingress and egress mcast lists */
struct mutex mce_lock; /* Serialize MCE updates */
};

struct nix_mce_list {
Expand All @@ -129,6 +130,23 @@ struct nix_mce_list {
int max;
};

struct nix_mcast_grp_elem {
struct nix_mce_list mcast_mce_list;
u32 mcast_grp_idx;
u32 pcifunc;
int mcam_index;
int mce_start_index;
struct list_head list;
u8 dir;
};

struct nix_mcast_grp {
struct list_head mcast_grp_head;
int count;
int next_grp_index;
struct mutex mcast_grp_lock; /* Serialize MCE updates */
};

/* layer metadata to uniquely identify a packet header field */
struct npc_layer_mdata {
u8 lid;
Expand Down Expand Up @@ -339,6 +357,7 @@ struct nix_hw {
struct rvu *rvu;
struct nix_txsch txsch[NIX_TXSCH_LVL_CNT]; /* Tx schedulers */
struct nix_mcast mcast;
struct nix_mcast_grp mcast_grp;
struct nix_flowkey flowkey;
struct nix_mark_format mark_format;
struct nix_lso lso;
Expand Down Expand Up @@ -741,6 +760,7 @@ void rvu_free_rsrc(struct rsrc_bmap *rsrc, int id);
bool is_rsrc_free(struct rsrc_bmap *rsrc, int id);
int rvu_rsrc_free_count(struct rsrc_bmap *rsrc);
int rvu_alloc_rsrc_contig(struct rsrc_bmap *rsrc, int nrsrc);
void rvu_free_rsrc_contig(struct rsrc_bmap *rsrc, int nrsrc, int start);
bool rvu_rsrc_check_contig(struct rsrc_bmap *rsrc, int nrsrc);
u16 rvu_get_rsrc_mapcount(struct rvu_pfvf *pfvf, int blkaddr);
int rvu_get_pf(u16 pcifunc);
Expand Down Expand Up @@ -847,6 +867,11 @@ u32 convert_dwrr_mtu_to_bytes(u8 dwrr_mtu);
u32 convert_bytes_to_dwrr_mtu(u32 bytes);
void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr, u16 pcifunc,
struct nix_txsch *txsch, bool enable);
void rvu_nix_mcast_flr_free_entries(struct rvu *rvu, u16 pcifunc);
int rvu_nix_mcast_get_mce_index(struct rvu *rvu, u16 pcifunc,
u32 mcast_grp_idx);
int rvu_nix_mcast_update_mcam_entry(struct rvu *rvu, u16 pcifunc,
u32 mcast_grp_idx, u16 mcam_index);

/* NPC APIs */
void rvu_npc_freemem(struct rvu *rvu);
Expand Down Expand Up @@ -895,6 +920,10 @@ void npc_mcam_enable_flows(struct rvu *rvu, u16 target);
void npc_mcam_disable_flows(struct rvu *rvu, u16 target);
void npc_enable_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
int blkaddr, int index, bool enable);
u64 npc_get_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,
int blkaddr, int index);
void npc_set_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,
int blkaddr, int index, u64 cfg);
void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,
int blkaddr, u16 src, struct mcam_entry *entry,
u8 *intf, u8 *ena);
Expand Down
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