Vector logf for x86_64 and tests.

Here is implementation of vectorized logf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for logf.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf16_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf_data.h: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector logf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector logf.

ChangeLog

@@ -1,5 +1,35 @@
 2015-06-17  Andrew Senkevich  <andrew.senkevich@intel.com>
 
+	* sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
+	* sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
+	redirections for logf.
+	* sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
+	* sysdeps/x86_64/fpu/Versions: New versions added.
+	* sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
+	* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
+	build of SSE, AVX2 and AVX512 IFUNC versions.
+	* sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S: New file.
+	* sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S: New file.
+	* sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S: New file.
+	* sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core_sse4.S: New file.
+	* sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S: New file.
+	* sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core_avx2.S: New file.
+	* sysdeps/x86_64/fpu/svml_s_logf16_core.S: New file.
+	* sysdeps/x86_64/fpu/svml_s_logf4_core.S: New file.
+	* sysdeps/x86_64/fpu/svml_s_logf8_core.S: New file.
+	* sysdeps/x86_64/fpu/svml_s_logf8_core_avx.S: New file.
+	* sysdeps/x86_64/fpu/svml_s_logf_data.S: New file.
+	* sysdeps/x86_64/fpu/svml_s_logf_data.h: New file.
+	* sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector logf tests.
+	* sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
+	* sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
+	* sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
+	* sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
+	* sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
+	* sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
+	* sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
+	* NEWS: Mention addition of x86_64 vector logf.
+
 	* bits/libm-simd-decl-stubs.h: Added stubs for log.
 	* math/bits/mathcalls.h: Added log declaration with __MATHCALL_VEC.
 	* sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.

NEWS

@@ -53,7 +53,7 @@ Version 2.22
   condition in some applications.
 
 * Added vector math library named libmvec with the following vectorized x86_64
-  implementations: cos, cosf, sin, sinf, log.
+  implementations: cos, cosf, sin, sinf, log, logf.
   The library can be disabled with --disable-mathvec. Use of the functions is
   enabled with -fopenmp -ffast-math starting from -O1 for GCC version >= 4.9.0.
   The library is linked in as needed when using -lm (no need to specify -lmvec

sysdeps/unix/sysv/linux/x86_64/libmvec.abilist

@@ -4,18 +4,22 @@ GLIBC_2.22
  _ZGVbN2v_log F
  _ZGVbN2v_sin F
  _ZGVbN4v_cosf F
+ _ZGVbN4v_logf F
  _ZGVbN4v_sinf F
  _ZGVcN4v_cos F
  _ZGVcN4v_log F
  _ZGVcN4v_sin F
  _ZGVcN8v_cosf F
+ _ZGVcN8v_logf F
  _ZGVcN8v_sinf F
  _ZGVdN4v_cos F
  _ZGVdN4v_log F
  _ZGVdN4v_sin F
  _ZGVdN8v_cosf F
+ _ZGVdN8v_logf F
  _ZGVdN8v_sinf F
  _ZGVeN16v_cosf F
+ _ZGVeN16v_logf F
  _ZGVeN16v_sinf F
  _ZGVeN8v_cos F
  _ZGVeN8v_log F

sysdeps/x86/fpu/bits/math-vector.h

@@ -38,6 +38,8 @@
 #  define __DECL_SIMD_sinf __DECL_SIMD_x86_64
 #  undef __DECL_SIMD_log
 #  define __DECL_SIMD_log __DECL_SIMD_x86_64
+#  undef __DECL_SIMD_logf
+#  define __DECL_SIMD_logf __DECL_SIMD_x86_64
 
 /* Workaround to exclude unnecessary symbol aliases in libmvec
    while GCC creates the vector names based on scalar asm name.
@@ -47,6 +49,10 @@ __asm__ ("_ZGVbN2v___log_finite = _ZGVbN2v_log");
 __asm__ ("_ZGVcN4v___log_finite = _ZGVcN4v_log");
 __asm__ ("_ZGVdN4v___log_finite = _ZGVdN4v_log");
 __asm__ ("_ZGVeN8v___log_finite = _ZGVeN8v_log");
+__asm__ ("_ZGVbN4v___logf_finite = _ZGVbN4v_logf");
+__asm__ ("_ZGVcN8v___logf_finite = _ZGVcN8v_logf");
+__asm__ ("_ZGVdN8v___logf_finite = _ZGVdN8v_logf");
+__asm__ ("_ZGVeN16v___logf_finite = _ZGVeN16v_logf");
 
 # endif
 #endif

sysdeps/x86_64/fpu/Makefile

@@ -8,7 +8,9 @@ libmvec-support += svml_d_cos2_core svml_d_cos4_core_avx \
 		   svml_s_sinf4_core svml_s_sinf8_core_avx \
 		   svml_s_sinf8_core svml_s_sinf16_core svml_s_sinf_data \
 		   svml_d_log2_core svml_d_log4_core_avx svml_d_log4_core \
-		   svml_d_log8_core svml_d_log_data \
+		   svml_d_log8_core svml_d_log_data svml_s_logf4_core \
+		   svml_s_logf8_core_avx svml_s_logf8_core svml_s_logf16_core \
+		   svml_s_logf_data \
 		   init-arch
 endif
 

sysdeps/x86_64/fpu/Versions

@@ -5,5 +5,6 @@ libmvec {
     _ZGVbN2v_log; _ZGVcN4v_log; _ZGVdN4v_log; _ZGVeN8v_log;
     _ZGVbN4v_cosf; _ZGVcN8v_cosf; _ZGVdN8v_cosf; _ZGVeN16v_cosf;
     _ZGVbN4v_sinf; _ZGVcN8v_sinf; _ZGVdN8v_sinf; _ZGVeN16v_sinf;
+    _ZGVbN4v_logf; _ZGVcN8v_logf; _ZGVdN8v_logf; _ZGVeN16v_logf;
   }
 }

sysdeps/x86_64/fpu/libm-test-ulps

@@ -1847,17 +1847,25 @@ ifloat: 2
 ildouble: 1
 ldouble: 1
 
+Function: "log_vlen16":
+float: 3
+
 Function: "log_vlen2":
 double: 1
 
 Function: "log_vlen4":
 double: 1
+float: 3
 
 Function: "log_vlen4_avx2":
 double: 1
 
 Function: "log_vlen8":
 double: 1
+float: 3
+
+Function: "log_vlen8_avx2":
+float: 2
 
 Function: "pow":
 float: 3

sysdeps/x86_64/fpu/multiarch/Makefile

@@ -60,5 +60,7 @@ libmvec-sysdep_routines += svml_d_cos2_core_sse4 svml_d_cos4_core_avx2 \
 			   svml_d_log8_core_avx512 \
 			   svml_s_cosf4_core_sse4 svml_s_cosf8_core_avx2 \
 			   svml_s_cosf16_core_avx512 svml_s_sinf4_core_sse4 \
-			   svml_s_sinf8_core_avx2 svml_s_sinf16_core_avx512
+			   svml_s_sinf8_core_avx2 svml_s_sinf16_core_avx512 \
+			   svml_s_logf4_core_sse4 svml_s_logf8_core_avx2 \
+			   svml_s_logf16_core_avx512
 endif

sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S

@@ -0,0 +1,39 @@
+/* Multiple versions of vectorized logf.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <init-arch.h>
+
+	.text
+ENTRY (_ZGVeN16v_logf)
+        .type   _ZGVeN16v_logf, @gnu_indirect_function
+        cmpl    $0, KIND_OFFSET+__cpu_features(%rip)
+        jne     1
+        call    __init_cpu_features
+1:      leaq    _ZGVeN16v_logf_skx(%rip), %rax
+        testl   $bit_AVX512DQ_Usable, __cpu_features+FEATURE_OFFSET+index_AVX512DQ_Usable(%rip)
+        jnz     3
+2:      leaq    _ZGVeN16v_logf_knl(%rip), %rax
+        testl   $bit_AVX512F_Usable, __cpu_features+FEATURE_OFFSET+index_AVX512F_Usable(%rip)
+        jnz     3
+        leaq    _ZGVeN16v_logf_avx2_wrapper(%rip), %rax
+3:      ret
+END (_ZGVeN16v_logf)
+
+#define _ZGVeN16v_logf _ZGVeN16v_logf_avx2_wrapper
+#include "../svml_s_logf16_core.S"