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ARM: dts: sun7i: Add DRAM gates
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The DRAM gates controls direct memory access for some peripherals.
These peripherals include the display pipeline, so add the required
gates to the simplefb nodes as well.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai authored and Maxime Ripard committed Dec 7, 2015
1 parent 82f8582 commit 0b4bf5a
Showing 1 changed file with 29 additions and 3 deletions.
32 changes: 29 additions & 3 deletions arch/arm/boot/dts/sun7i-a20.dtsi
View file
Original file line number Diff line number Diff line change
@@ -68,15 +68,16 @@
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
<&ahb_gates 44>;
<&ahb_gates 44>, <&dram_gates 26>;
status = "disabled";
};

framebuffer@1 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
<&dram_gates 26>;
status = "disabled";
};

@@ -85,7 +86,7 @@
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-tve0";
clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
<&ahb_gates 44>;
<&ahb_gates 44>, <&dram_gates 26>;
status = "disabled";
};
};
@@ -501,6 +502,31 @@
clock-output-names = "spi3";
};

dram_gates: clk@01c20100 {
#clock-cells = <1>;
compatible = "allwinner,sun4i-a10-dram-gates-clk";
reg = <0x01c20100 0x4>;
clocks = <&pll5 0>;
clock-indices = <0>,
<1>, <2>,
<3>,
<4>,
<5>, <6>,
<15>,
<24>, <25>,
<26>, <27>,
<28>, <29>;
clock-output-names = "dram_ve",
"dram_csi0", "dram_csi1",
"dram_ts",
"dram_tvd",
"dram_tve0", "dram_tve1",
"dram_output",
"dram_de_fe1", "dram_de_fe0",
"dram_de_be0", "dram_de_be1",
"dram_de_mp", "dram_ace";
};

codec_clk: clk@01c20140 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-codec-clk";

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